diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml new file mode 100644 index 00000000000..1e08648f5bc --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG SW43408 1080x2160 DSI panel + +maintainers: + - Caleb Connolly + +description: + This panel is used on the Pixel 3, it is a 60hz OLED panel which + required DSC (Display Stream Compression) and has rounded corners. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: lg,sw43408 + + reg: true + port: true + vddi-supply: true + vpnl-supply: true + reset-gpios: true + +required: + - compatible + - vddi-supply + - vpnl-supply + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "lg,sw43408"; + reg = <0>; + + vddi-supply = <&vreg_l14a_1p88>; + vpnl-supply = <&vreg_l28a_3p0>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + port { + endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml index f9160d7bac3..5605608cd2f 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml @@ -79,8 +79,12 @@ allOf: then: properties: power-supply: false + vci-supply: true + poc-supply: true required: - vddio-supply + - vci-supply + - poc-supply else: properties: vddio-supply: false diff --git a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml index 77239906751..025c346811a 100644 --- a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml +++ b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml @@ -18,7 +18,9 @@ allOf: properties: compatible: - const: visionox,rm69299-1080p-display + enum: + - visionox,rm69299-1080p-display + - visionox,rm69299-shift reg: true diff --git a/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml new file mode 100644 index 00000000000..8ef9b4ec3a0 --- /dev/null +++ b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2020 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies Inc PMI8998 spmi haptics + +maintainers: + - Caleb Connolly + +description: | + Qualcomm SPMI haptics is a peripheral on some QTI PMICs. It supports linear resonant + actuators and eccentric rotating mass type haptics commonly found in mobile devices. + It supports multiple sources of wave data such as an internal buffer, direct play + (from kernel or userspace) as well as an audio output mode. + +properties: + compatible: + items: + - enum: + - qcom,pmi8998-haptics + - qcom,pmi8996-haptics + - qcom,pmi8941-haptics + - const: qcom,spmi-haptics + + reg: + maxItems: 1 + + interrupts: + items: + - description: short circuit interrupt + - description: play interrupt + + interrupt-names: + items: + - const: short + - const: play + + qcom,actuator-type: + description: | + The type of actuator attached to the hardware. + Allowed values are, + 0 - HAP_TYPE_LRA + 1 - HAP_TYPE_ERM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,wave-shape: + description: | + Selects the wave shape to use. + Allowed values are, + 0 - HAP_WAVE_SINE + 1 - HAP_WAVE_SQUARE + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,play-mode: + description: | + Selects the play mode to use. + Allowed values are, + 0 - HAP_PLAY_DIRECT + 1 - HAP_PLAY_BUFFER + 2 - HAP_PLAY_AUDIO + 3 - HAP_PLAY_PWM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3 ] + default: 2 + + qcom,wave-play-rate-us: + description: | + Wave sample durection in microseconds, 1/f where f + is the resonant frequency of the actuator. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20475 + + qcom,brake-pattern: + minItems: 4 + maxItems: 4 + description: | + The brake pattern are the strengths of the pattern + used to brake the haptics. Allowed values are, + 0 - 0V + 1 - Vmax/4 + 2 - Vmax/2 + 3 - Vmax + $ref: /schemas/types.yaml#/definitions/uint32-array + default: [0x3, 0x3, 0x2, 0x1] + +required: + - compatible + - reg + - interrupts + - qcom,wave-play-rate-us + +additionalProperties: false + +examples: + - | + #include + #include + #include + + pmi8998_lsid1: pmic@3 { + compatible = "qcom,pmi8998", "qcom,spmi-pmic"; + reg = <0x3 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmi8998_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics", "qcom,spmi-haptics"; + reg = <0xc000>; + + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x3 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,wave-shape = ; + qcom,play-mode = ; + qcom,brake-pattern = <0x3 0x3 0x2 0x1>; + + status = "disabled"; + }; + }; diff --git a/Documentation/devicetree/bindings/input/syna,rmi4.yaml b/Documentation/devicetree/bindings/input/syna,rmi4.yaml index b522c8d3ce0..04ce256300c 100644 --- a/Documentation/devicetree/bindings/input/syna,rmi4.yaml +++ b/Documentation/devicetree/bindings/input/syna,rmi4.yaml @@ -49,6 +49,16 @@ properties: description: Delay to wait after powering on the device. + syna,pdt-fallback-desc: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: + An array of pairs of function number and version. These are used + on some devices with replacement displays that use unofficial touch + controllers. These controllers do report the properties of their PDT + entries, but leave the function_number and function_version registers + blank. These values should match exactly the 5th and 4th bytes of each + PDT entry from the original display's touch controller. + vdd-supply: true vio-supply: true diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml index f2808cb4d99..745e57c0517 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml @@ -39,7 +39,9 @@ properties: - edt,edt-ft5406 - edt,edt-ft5506 - evervision,ev-ft5726 + - focaltech,ft5452 - focaltech,ft6236 + - focaltech,ft8719 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml index 1ba607685f5..7868569ab6d 100644 --- a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml @@ -23,11 +23,11 @@ properties: items: - enum: - qcom,pm6150l-flash-led + - qcom,pmi8998-flash-led - qcom,pm8150c-flash-led - qcom,pm8150l-flash-led - qcom,pm8350c-flash-led - qcom,pm8550-flash-led - - qcom,pmi8998-flash-led - const: qcom,spmi-flash-led reg: diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml index 9b3ef4bc373..bc6b67d63c2 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml @@ -139,6 +139,12 @@ properties: description: Quirk specifying that the firmware expects the 8bit version of the host capability QMI request + + qcom,snoc-host-cap-skip-quirk: + type: boolean + description: + Quirk specifying that the firmware wants to skip the host + capability QMI request qcom,xo-cal-data: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml new file mode 100644 index 00000000000..37977344f15 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/lenovo,yoga-c630-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lenovo Yoga C630 Embedded Controller. + +maintainers: + - Bjorn Andersson + +description: + The Qualcomm Snapdragon-based Lenovo Yoga C630 has an Embedded Controller + (EC) which handles things such as battery and USB Type-C. This binding + describes the interface, on an I2C bus, to this EC. + +properties: + compatible: + const: lenovo,yoga-c630-ec + + reg: + const: 0x70 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + interrupts: + maxItems: 1 + +patternProperties: + '^connector@[01]$': + $ref: /schemas/connector/usb-connector.yaml# + + properties: + reg: + maxItems: 1 + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - |+ + #include + i2c1 { + clock-frequency = <400000>; + + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@70 { + compatible = "lenovo,yoga-c630-ec"; + reg = <0x70>; + + interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "source"; + data-role = "host"; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "source"; + data-role = "host"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml b/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml new file mode 100644 index 00000000000..29af7aa8379 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-3-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/qcom,fg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm PMIC Fuel Gauge + +maintainers: + - Caleb Connolly + - Joel Selvaraj + - Yassine Oudjana + +properties: + compatible: + enum: + - qcom,pm8994-fg + - qcom,pm8998-fg + + reg: + maxItems: 1 + + monitored-battery: + description: | + phandle of battery characteristics node. + The fuel gauge uses the following battery properties: + - charge-full-design-microamp-hours + - voltage-min-design-microvolt + - voltage-max-design-microvolt + See Documentation/devicetree/bindings/power/supply/battery.yaml + +allOf: + - if: + properties: + compatible: + enum: + - qcom,pm8994-fg + + then: + properties: + interrupts: + items: + - description: State of charge change interrupt + - description: SRAM availability change interrupt + + interrupt-names: + items: + - const: soc-delta + - const: mem-avail + + - if: + properties: + compatible: + enum: + - qcom,pm8998-fg + + then: + properties: + interrupts: + items: + - description: State of charge change interrupt + + interrupt-names: + items: + - const: soc-delta + +required: + - compatible + - reg + - monitored-battery + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4070000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4400000>; + }; + + pmic { + #address-cells = <1>; + #size-cells = <0>; + + fuel-gauge@4000 { + compatible = "qcom,pmi8994-fg"; + reg = <0x4000>; + + interrupts = <0x2 0x40 0x4 IRQ_TYPE_EDGE_RISING>, + <0x2 0x44 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "soc-delta", "mem-avail"; + + monitored-battery = <&battery>; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml new file mode 100644 index 00000000000..690537738e6 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/samsung,s2dos05.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung s2dos05 regulator + +maintainers: + - Dzmitry Sankouski + +description: | + The S2DOS05 is a companion power management IC for the smart phones. + Has 4 LDO and 1 BUCK regulators, and has capability to measure + current and power. Can detect short circuit on outputs. + +properties: + compatible: + const: samsung,s2dos05 + reg: + maxItems: 1 + + regulators: + type: object + description: List of regulators and its properties + + patternProperties: + "^s2dos05-buck1|s2dos05-ldo[1-4]$": + type: object + $ref: "regulator.yaml#" + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + regulator@60 { + compatible = "samsung,s2dos05"; + reg = <0x60>; + pinctrl-names = "default"; + pinctrl-0 = <&s2dos05_irq>; + s2dos05,s2dos05_int = <&tlmm 0x31 0x0>; + + regulators { + s2dos05_ldo1: s2dos05-ldo1 { + regulator-name = "s2dos05-ldo1"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2000000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_ldo2: s2dos05-ldo2 { + regulator-name = "s2dos05-ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo3: s2dos05-ldo3 { + regulator-name = "s2dos05-ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo4: s2dos05-ldo4 { + regulator-name = "s2dos05-ldo4"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3775000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_buck1: s2dos05-buck1 { + regulator-name = "s2dos05-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <2100000>; + regulator-active-discharge = <0x1>; + }; + }; + }; diff --git a/Documentation/input/event-codes.rst b/Documentation/input/event-codes.rst index b4557462edd..d43336e64d6 100644 --- a/Documentation/input/event-codes.rst +++ b/Documentation/input/event-codes.rst @@ -241,6 +241,12 @@ A few EV_ABS codes have special meanings: emitted only when the selected profile changes, indicating the newly selected profile value. +* ABS_SND_PROFILE: + + - Used to describe the state of a multi-value sound profile switch. + An event is emitted only when the selected profile changes, + indicating the newly selected profile value. + * ABS_MT_: - Used to describe multitouch input events. Please see diff --git a/MAINTAINERS b/MAINTAINERS index 28e20975c26..3aaf0eb1b01 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6752,6 +6752,14 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml F: drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +DRM DRIVER FOR LG SW43408 PANELS +M: Sumit Semwal +M: Caleb Connolly +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml +F: drivers/gpu/drm/panel/panel-lg-sw43408.c + DRM DRIVER FOR LOGICVC DISPLAY CONTROLLER M: Paul Kocialkowski S: Supported @@ -6931,6 +6939,11 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/samsung,s6d7aa0.yaml F: drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c +DRM DRIVER FOR SAMSUNG S6E3FC2X01 PANELS +M: Nia Espera +S: Maintained +F: drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c + DRM DRIVER FOR SITRONIX ST7586 PANELS M: David Lechner S: Maintained diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 7d40ec5e7d2..e375445d249 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -190,6 +190,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm845-google-blueline.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/pmi8998.dtsi b/arch/arm64/boot/dts/qcom/pmi8998.dtsi index cd3f0790fd4..2ceee5ff81b 100644 --- a/arch/arm64/boot/dts/qcom/pmi8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8998.dtsi @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include #include @@ -44,6 +45,17 @@ pmi8998_rradc: adc@4500 { reg = <0x4500>; #io-channel-cells = <1>; }; + + pmi8998_fg: fuel-gauge@4000 { + compatible = "qcom,pmi8998-fg"; + reg = <0x4000>; + + interrupts = <0x2 0x40 0x3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "soc-delta"; + + status = "disabled"; + }; + }; pmi8998_lsid1: pmic@3 { @@ -94,5 +106,20 @@ pmi8998_wled: leds@d800 { status = "disabled"; }; + + pmi8998_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics", "qcom,spmi-haptics"; + reg = <0xc000>; + + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x3 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,wave-shape = ; + qcom,play-mode = ; + qcom,brake-pattern = <0x3 0x3 0x2 0x1>; + + status = "disabled"; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 1f517328199..49b1d93db1e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -194,6 +194,7 @@ pcie0_3p3v_dual: vldo-3v3-regulator { regulator-max-microvolt = <3300000>; gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; + regulator-always-on; enable-active-high; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts b/arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts new file mode 100644 index 00000000000..2a4bfd354fa --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts @@ -0,0 +1,689 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include +#include +#include +#include + +#include "sdm845.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" + +/delete-node/ &mpss_region; +/delete-node/ &venus_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &mba_region; +/delete-node/ &slpi_mem; +/delete-node/ &spss_mem; +/delete-node/ &rmtfs_mem; + +/ { + model = "Google Pixel 3"; + compatible = "google,blueline", "qcom,sdm845"; + qcom,board-id = <0x00021505 0>; + qcom,msm-id = <321 0x20001>; + + aliases { + serial0 = &uart9; + serial1 = &uart6; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + volume-keys { + compatible = "gpio-keys"; + label = "Volume keys"; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&volume_up_gpio>; + + vol-up { + label = "Volume Up"; + linux,code = ; + gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mpss_region: memory@8e000000 { + reg = <0 0x8e000000 0 0x9800000>; + no-map; + }; + + venus_mem: venus@97800000 { + reg = <0 0x97800000 0 0x500000>; + no-map; + }; + + cdsp_mem: cdsp-mem@97D00000 { + reg = <0 0x97D00000 0 0x800000>; + no-map; + }; + + mba_region: mba@98500000 { + reg = <0 0x98500000 0 0x200000>; + no-map; + }; + + slpi_mem: slpi@98700000 { + reg = <0 0x98700000 0 0x1400000>; + no-map; + }; + + spss_mem: spss@99B00000 { + reg = <0 0x99B00000 0 0x100000>; + no-map; + }; + + /* rmtfs lower guard */ + memory@f2700000 { + reg = <0 0xf2700000 0 0x1000>; + no-map; + }; + + rmtfs_mem: memory@f2701000 { + compatible = "qcom,rmtfs-mem"; + reg = <0 0xf2701000 0 0x200000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + + /* rmtfs upper guard */ + memory@f2901000 { + reg = <0 0xf2901000 0 0x1000>; + no-map; + }; + }; + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <2970000>; + voltage-min-design-microvolt = <3600000>; + voltage-max-design-microvolt = <4400000>; + }; + + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + vreg_s4a_1p8: vreg-s4a-1p8 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vph_pwr>; + }; +}; + +&adsp_pas { + status = "okay"; + + firmware-name = "qcom/sdm845/pixel3/adsp.mbn"; +}; + +&apps_rsc { + pm8998-rpmh-regulators { + compatible = "qcom,pm8998-rpmh-regulators"; + qcom,pmic-id = "a"; + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-s11-supply = <&vph_pwr>; + vdd-s12-supply = <&vph_pwr>; + vdd-s13-supply = <&vph_pwr>; + vdd-l1-l27-supply = <&vreg_s7a_1p025>; + vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; + vdd-l3-l11-supply = <&vreg_s7a_1p025>; + vdd-l4-l5-supply = <&vreg_s7a_1p025>; + vdd-l6-supply = <&vph_pwr>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; + vdd-l9-supply = <&vreg_bob>; + vdd-l10-l23-l25-supply = <&vreg_bob>; + vdd-l13-l19-l21-supply = <&vreg_bob>; + vdd-l16-l28-supply = <&vreg_bob>; + vdd-l18-l22-supply = <&vreg_bob>; + vdd-l20-l24-supply = <&vreg_bob>; + vdd-l26-supply = <&vreg_s3a_1p35>; + vin-lvs-1-2-supply = <&vreg_s4a_1p8>; + + vreg_s3a_1p35: smps3 { + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s5a_2p04: smps5 { + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7a_1p025: smps7 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1028000>; + }; + + vdda_mipi_dsi0_pll: + vreg_l1a_0p875: ldo1 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + regulator-boot-on; + }; + + vreg_l5a_0p8: ldo5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_2p95: ldo13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p88: ldo14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-boot-on; + /* + * We can't properly bring the panel back if it gets turned off + * so keep it's regulators always on for now. + */ + regulator-always-on; + }; + + vreg_l17a_1p3: ldo17 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l19a_3p3: ldo19 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3312000>; + qcom,init-voltage = <3300000>; + qcom,initial-mode = ; + /* + * The touchscreen needs this to be 3.3v, which is apparently + * quite close to the hardware limit for this LDO (3.312v) + * It must be kept in high power mode to prevent TS brownouts + */ + regulator-allowed-modes = ; + }; + + vreg_l20a_2p95: ldo20 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2968000>; + regulator-initial-mode = ; + }; + + vreg_l21a_2p95: ldo21 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2968000>; + regulator-initial-mode = ; + }; + + vreg_l24a_3p075: ldo24 { + regulator-min-microvolt = <3088000>; + regulator-max-microvolt = <3088000>; + regulator-initial-mode = ; + }; + + vreg_l25a_3p3: ldo25 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vdda_mipi_dsi0_1p2: + vreg_l26a_1p2: ldo26 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-boot-on; + }; + + vreg_l28a_3p0: ldo28 { + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + regulator-boot-on; + /* + * We can't properly bring the panel back if it gets turned off + * so keep it's regulators always on for now. + */ + regulator-always-on; + }; + }; + + pmi8998-rpmh-regulators { + compatible = "qcom,pmi8998-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3600000>; + regulator-initial-mode = ; + regulator-allow-bypass; + }; + }; + + pm8005-rpmh-regulators { + compatible = "qcom,pm8005-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + + vreg_s3c_0p6: smps3 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <600000>; + }; + }; +}; + +&cdsp_pas { + status = "okay"; + firmware-name = "qcom/sdm845/pixel3/cdsp.mbn"; +}; + +&mdss_dsi0 { + status = "okay"; + vdda-supply = <&vdda_mipi_dsi0_1p2>; + + panel { + compatible = "lg,sw43408"; + reg = <0>; + + vddi-supply = <&vreg_l14a_1p88>; + vpnl-supply = <&vreg_l28a_3p0>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_pmgpio_pins>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lg_sw43408_in_0: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint = <&lg_sw43408_in_0>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; + vdds-supply = <&vdda_mipi_dsi0_pll>; +}; + +&gcc { + protected-clocks = , + , + ; +}; + +&gmu { + status = "okay"; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&gpu { + status = "okay"; + + zap-shader { + memory-region = <&gpu_mem>; + firmware-name = "qcom/sdm845/pixel3/a630_zap.mbn"; + }; +}; + +&i2c2 { + status = "disabled"; + #dma-cells = <3>; + + dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, + <&gpi_dma0 1 2 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + + touchscreen@49 { + compatible = "st,fts"; + reg = <0x49>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins &touchscreen_reset>; + interrupt-parent = <&tlmm>; + interrupts = <125 IRQ_TYPE_LEVEL_LOW>; + avdd-supply = <&vreg_l14a_1p88>; + vdd-supply = <&vreg_l19a_3p3>; + // touchscreen-size-x = <1080>; + // touchscreen-size-y = <2160>; + + st,irq-gpio = <&tlmm 125 0>; + st,reset-gpio = <&tlmm 99 0>; + st,switch_gpio = <&tlmm 136 0>; + st,max-coords = <1079 2159>; + st,regulator_dvdd = "vdd"; + st,regulator_avdd = "avdd"; + }; +}; + +&ipa { + status = "okay"; + + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/sdm845/pixel3/ipa_fws.mbn"; +}; + +&mss_pil { + status = "okay"; + firmware-name = "qcom/sdm845/pixel3/mba.mbn", "qcom/sdm845/pixel3/modem.mbn"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_mdp { + status = "okay"; +}; + +&pm8998_gpios { + volume_up_gpio: vol-up-active { + pins = "gpio6"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,drive-strength = <0>; + }; + + panel_pmgpio_pins: panel-pmgpio-active { + pins = "gpio2", "gpio5"; + function = "normal"; + input-enable; + bias-disable; + power-source = <0>; + }; +}; + +&pm8998_pon { + resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; +}; + +&pmi8998_charger { + status = "okay"; + monitored-battery = <&battery>; +}; + +&pmi8998_fg { + status = "okay"; + monitored-battery = <&battery>; + power-supplies = <&pmi8998_charger>; +}; + +&pmi8998_rradc { + status = "okay"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&qup_uart6_default { + pinmux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "qup6"; + }; + + cts { + pins = "gpio45"; + bias-disable; + }; + + rts-tx { + pins = "gpio46", "gpio47"; + drive-strength = <2>; + bias-disable; + }; + + rx { + pins = "gpio48"; + bias-pull-up; + }; +}; + +&qup_uart9_default { + pinconf-tx { + pins = "gpio4"; + drive-strength = <2>; + bias-disable; + }; + + pinconf-rx { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>, <81 4>; + + panel_te_pin: panel-te { + mux { + pins = "gpio12"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + }; + + panel_reset_pins: panel-active { + mux { + pins = "gpio6", "gpio52"; + function = "gpio"; + drive-strength = <8>; + bias-disable = <0>; + }; + }; + + panel_suspend: panel-suspend { + mux { + pins = "gpio6", "gpio52"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + touchscreen_reset: ts-reset { + mux { + pins = "gpio99"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + //output-high; + }; + }; + + touchscreen_pins: ts-pins { + mux { + pins = "gpio125"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; +}; + +&uart6 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + + vddio-supply = <&vreg_s4a_1p8>; + vddxo-supply = <&vreg_l7a_1p8>; + vddrf-supply = <&vreg_l17a_1p3>; + vddch0-supply = <&vreg_l25a_3p3>; + max-speed = <3200000>; + }; +}; + +&uart9 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdd-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; + + qcom,imp-res-offset-value = <8>; + qcom,hstx-trim-value = ; + qcom,preemphasis-level = ; + qcom,preemphasis-width = ; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l26a_1p2>; + vdda-pll-supply = <&vreg_l1a_0p875>; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + +&usb_2_hsphy { + status = "okay"; + + vdd-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; + + qcom,imp-res-offset-value = <8>; + qcom,hstx-trim-value = ; +}; + +&usb_2_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l26a_1p2>; + vdda-pll-supply = <&vreg_l1a_0p875>; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l20a_2p95>; + vcc-max-microamp = <800000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l26a_1p2>; +}; + +&venus { + status = "okay"; + firmware-name = "qcom/sdm845/oneplus6/venus.mbn"; +}; + +&wifi { + status = "okay"; + + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; + vdd-1.8-xo-supply = <&vreg_l7a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + + qcom,snoc-host-cap-8bit-quirk; + qcom,ath10k-calibration-variant = "google_blueline"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi index 99dafc6716e..57ed447409d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi @@ -93,12 +93,6 @@ spss_mem: memory@99000000 { no-map; }; - /* Framebuffer region */ - memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x2400000>; - no-map; - }; - /* rmtfs lower guard */ memory@f0800000 { reg = <0 0xf0800000 0 0x1000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi index 46e25c53829..5f4d18aa33f 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include "sdm845.dtsi" #include "sdm845-wcd9340.dtsi" @@ -21,6 +23,41 @@ /delete-node/ &rmtfs_mem; / { + alert-slider { + compatible = "gpio-keys"; + label = "Alert slider"; + + pinctrl-0 = <&alert_slider_default>; + pinctrl-names = "default"; + + switch-top { + label = "Silent"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + + switch-middle { + label = "Vibrate"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + + switch-bottom { + label = "Ring"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 24 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + }; + aliases { serial0 = &uart9; serial1 = &uart6; @@ -156,6 +193,29 @@ ts_1p8_supply: ts-1p8-regulator { gpio = <&tlmm 88 0>; enable-active-high; + }; + + panel_vci_3v3: panel-vci-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "LCD_VCI_3V"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + panel_vddi_poc_1p8: panel-vddi-poc-regulator { + compatible = "regulator-fixed"; + regulator-name = "VDDI_POC"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>; + enable-active-high; regulator-boot-on; }; }; @@ -253,7 +313,7 @@ vreg_l14a_1p88: ldo14 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = ; - regulator-always-on; + regulator-boot-on; }; vreg_l17a_1p3: ldo17 { @@ -389,6 +449,8 @@ synaptics-rmi4-i2c@20 { syna,reset-delay-ms = <200>; syna,startup-delay-ms = <200>; + syna,pdt-fallback-desc = [34 41 01 01 12 01]; + rmi4-f01@1 { reg = <0x01>; syna,nosleep-mode = <1>; @@ -397,7 +459,7 @@ rmi4-f01@1 { rmi4_f12: rmi4-f12@12 { reg = <0x12>; touchscreen-x-mm = <68>; - touchscreen-y-mm = <144>; + syna,clip-x-high = <1079>; syna,sensor-type = <1>; syna,rezero-wait-ms = <200>; }; @@ -429,6 +491,8 @@ display_panel: panel@0 { reg = <0>; vddio-supply = <&vreg_l14a_1p88>; + vci-supply = <&panel_vci_3v3>; + poc-supply = <&panel_vddi_poc_1p8>; reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; @@ -507,6 +571,24 @@ led-1 { }; }; +&pmi8998_haptics { + status = "okay"; + + qcom,wave-play-rate-us = <4255>; +}; + +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; +}; + &q6afedai { dai@22 { reg = ; @@ -626,6 +708,13 @@ cpu { }; }; + voicemmode1-dai-link { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; + speaker_playback_dai: speaker-dai-link { link-name = "Speaker Playback"; cpu { @@ -803,8 +892,9 @@ hall_sensor_default: hall-sensor-default-state { bias-disable; }; - tri_state_key_default: tri-state-key-default-state { - pins = "gpio40", "gpio42", "gpio26"; + + alert_slider_default: alert-slider-default-state { + pins = "gpio126", "gpio52", "gpio24"; function = "gpio"; drive-strength = <2>; bias-disable; @@ -818,7 +908,7 @@ ts_default_pins: ts-int-state { }; panel_reset_pins: panel-reset-state { - pins = "gpio6", "gpio25", "gpio26"; + pins = "gpio6"; function = "gpio"; drive-strength = <8>; bias-disable; @@ -872,4 +962,5 @@ &wifi { vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; + qcom,ath10k-calibration-variant = "oneplus_sdm845"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts index 4005e04d998..476f0810fbc 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts @@ -6,6 +6,7 @@ */ #include "sdm845-oneplus-common.dtsi" +#include / { model = "OnePlus 6"; @@ -55,6 +56,33 @@ &pmi8998_charger { monitored-battery = <&battery>; }; +&pmi8998_lpg { + status = "okay"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@3 { + reg = <3>; + color = ; + }; + + led@4 { + reg = <4>; + color = ; + }; + + led@5 { + reg = <5>; + color = ; + }; + }; +}; + &sound { model = "OnePlus 6"; audio-routing = "RX_BIAS", "MCLK", @@ -70,6 +98,11 @@ codec { }; }; +&rmi4_f12 { + touchscreen-y-mm = <144>; + syna,clip-y-high = <2279>; +}; + &wcd9340 { qcom,micbias1-microvolt = <1800000>; qcom,micbias2-microvolt = <2700000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts index 9471ada0d6a..5a81287fa6d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts @@ -30,7 +30,16 @@ &display_panel { }; &i2c4 { - /* nxp,tfa9894 @ 0x34 */ + status = "okay"; + clock-frequency = <400000>; + + tfa9894_codec: tfa9894@34 { + #sound-dai-cells = <1>; + compatible = "nxp,tfa9894"; + reg = <0x34>; + reset-gpio = <&tlmm 69 0>; + }; + }; &bq27441_fg { @@ -51,15 +60,15 @@ &pmi8998_charger { monitored-battery = <&battery>; }; -/* - * The TFA9894 codec is currently unsupported. - * We need to delete the node to allow the soundcard - * to probe for headphones/earpiece. - */ -/delete-node/ &speaker_playback_dai; +&speaker_playback_dai { + codec { + sound-dai = <&tfa9894_codec 0>; + }; +}; &rmi4_f12 { touchscreen-y-mm = <148>; + syna,clip-y-high = <2339>; }; &wcd9340 { diff --git a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts index d37a433130b..a3b0aff86c8 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts @@ -11,11 +11,17 @@ #include #include "sdm845.dtsi" +/delete-node/ &rmtfs_mem; + / { chassis-type = "handset"; model = "Samsung Galaxy S9 SM-G9600"; compatible = "samsung,starqltechn", "qcom,sdm845"; + aliases { + serial0 = &uart9; + }; + chosen { #address-cells = <2>; #size-cells = <2>; @@ -27,6 +33,9 @@ framebuffer: framebuffer@9d400000 { height = <2960>; stride = <(1440 * 4)>; format = "a8r8g8b8"; + vci-supply = <&s2dos05_ldo4>; + vddr-supply = <&s2dos05_buck1>; + vdd3-supply = <&s2dos05_ldo1>; }; }; @@ -55,11 +64,6 @@ vreg_s4a_1p8: pm8998-smps4 { }; reserved-memory { - memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x02400000>; - no-map; - }; - memory@a1300000 { compatible = "ramoops"; reg = <0x0 0xa1300000 0x0 0x100000>; @@ -68,6 +72,93 @@ memory@a1300000 { ftrace-size = <0x40000>; pmsg-size = <0x40000>; }; + + /* The rmtfs_mem needs to be guarded due to "XPU limitations" + * it is otherwise possible for an allocation adjacent to the + * rmtfs_mem region to trigger an XPU violation, causing a crash. + */ + rmtfs_lower_guard: memory@fde00000 { + no-map; + reg = <0 0xfde00000 0 0x1000>; + }; + + rmtfs_mem: rmtfs-mem@fde01000 { + compatible = "qcom,rmtfs-mem"; + reg = <0 0xfde01000 0 0x200000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + + rmtfs_upper_guard: rmtfs-upper-guard@fe001000 { + no-map; + reg = <0 0xfe001000 0 0x1000>; + }; + + /* + * It seems like reserving the old rmtfs_mem region is also needed to prevent + * random crashes which are most likely modem related, more testing needed. + */ + removed_region: removed-region@88f00000 { + no-map; + reg = <0 0x88f00000 0 0x1c00000>; + }; + }; + + i2c@21 { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 127 0x0>; + scl-gpios = <&tlmm 128 0x0>; + i2c-gpio,delay-us = <0x2>; + #address-cells = <0x1>; + #size-cells = <0x0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c21_sda_state &i2c21_scl_state>; + + regulator@60 { + compatible = "samsung,s2dos05"; + reg = <0x60>; + + regulators { + s2dos05_ldo1: s2dos05-ldo1 { + regulator-name = "s2dos05-ldo1"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2000000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_ldo2: s2dos05-ldo2 { + regulator-name = "s2dos05-ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo3: s2dos05-ldo3 { + regulator-name = "s2dos05-ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo4: s2dos05-ldo4 { + regulator-name = "s2dos05-ldo4"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3775000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_buck1: s2dos05-buck1 { + regulator-name = "s2dos05-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <2100000>; + regulator-active-discharge = <0x1>; + }; + }; + }; }; }; @@ -135,8 +226,6 @@ vdda_pll_cc_ebi23: vdda_sp_sensor: vdda_ufs1_core: vdda_ufs2_core: - vdda_usb1_ss_core: - vdda_usb2_ss_core: vreg_l1a_0p875: ldo1 { regulator-min-microvolt = <880000>; regulator-max-microvolt = <880000>; @@ -157,6 +246,7 @@ vreg_l3a_1p0: ldo3 { regulator-initial-mode = ; }; + vdda_usb1_ss_core: vdd_wcss_cx: vdd_wcss_mx: vdda_wcss_pll: @@ -365,6 +455,10 @@ &qupv3_id_1 { status = "okay"; }; +&gpi_dma1 { + status = "okay"; +}; + &uart9 { status = "okay"; }; @@ -391,13 +485,55 @@ &sdhc_2 { status = "okay"; }; +&i2c11 { + status = "okay"; + clock-frequency = <400000>; + + touchscreen@48 { + compatible = "samsung,s6sy761"; + reg = <0x48>; + interrupt-parent = <&tlmm>; + interrupts = <120 0x0>; + vdd-supply = <&s2dos05_ldo2>; + avdd-supply = <&s2dos05_ldo3>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_irq_state>; + }; +}; + +&crypto { + /* FIXME: qce_start triggers an SError */ + status = "disable"; +}; + +/* Modem/wifi*/ +&mss_pil { + status = "okay"; + firmware-name = "qcom/sdm845/starqltechn/mba.mbn", "qcom/sdm845/starqltechn/modem.mbn"; +}; + +&ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/sdm845/starqltechn/ipa_fws.mbn"; + status = "okay"; +}; + &usb_1 { status = "okay"; + /* + * disable USB3 clock requirement as the device only supports + * USB2. + */ + qcom,select-utmi-as-pipe-clk; }; &usb_1_dwc3 { /* Until we have Type C hooked up we'll force this as peripheral. */ dr_mode = "peripheral"; + + maximum-speed = "high-speed"; }; &usb_1_hsphy { @@ -418,14 +554,6 @@ &usb_1_qmpphy { status = "okay"; }; -&wifi { - vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; - vdd-1.8-xo-supply = <&vreg_l7a_1p8>; - vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; - vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; - status = "okay"; -}; - &tlmm { gpio-reserved-ranges = <0 4>, <27 4>, <81 4>, <85 4>; @@ -457,4 +585,40 @@ sd_card_det_n_state: sd-card-det-n-state { function = "gpio"; bias-pull-up; }; + + i2c21_sda_state: i2c-sda-state { + pins = "gpio127"; + function = "gpio"; + drive-strength = <0x2>; + bias-disable; + }; + + i2c21_scl_state: i2c-scl-state { + pins = "gpio128"; + function = "gpio"; + drive-strength = <0x2>; + bias-disable; + }; + + touch_irq_state: touch-irq-state { + pins = "gpio120"; + function = "gpio"; + bias-disable; + output-disable; + }; +}; + +&qup_uart9_tx { + drive-strength = <0x2>; + bias-pull-up; +}; + +&qup_uart9_rx { + drive-strength = <0x2>; + bias-pull-up; +}; + +&qup_i2c11_default { + drive-strength = <2>; + bias-disable; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts index 486ce175e6b..3fd0d3fd669 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts @@ -10,7 +10,11 @@ #include #include #include +#include +#include +#include #include "sdm845.dtsi" +#include "sdm845-wcd9340.dtsi" #include "pm8998.dtsi" #include "pmi8998.dtsi" @@ -22,6 +26,7 @@ / { aliases { display0 = &framebuffer0; + hsuart0 = &uart6; serial0 = &uart9; serial1 = &uart6; }; @@ -60,11 +65,6 @@ key-vol-up { }; reserved-memory { - framebuffer@9d400000 { - reg = <0x0 0x9d400000 0x0 (1080 * 2160 * 4)>; - no-map; - }; - ramoops: ramoops@b0000000 { compatible = "ramoops"; reg = <0 0xb0000000 0 0x00400000>; @@ -434,25 +434,24 @@ zap-shader { &i2c5 { status = "okay"; + clock-frequency = <400000>; touchscreen@38 { - compatible = "focaltech,fts8719"; + compatible = "focaltech,ft5452"; reg = <0x38>; - wakeup-source; - interrupt-parent = <&tlmm>; - interrupts = <125 IRQ_TYPE_EDGE_FALLING>; - vdd-supply = <&vreg_l28a_3p0>; - vcc-i2c-supply = <&vreg_l14a_1p88>; - pinctrl-names = "default", "suspend"; + interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l28a_3p0>; + iovcc-supply = <&vreg_l14a_1p88>; + pinctrl-0 = <&ts_int_active &ts_reset_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-names = "default", "suspend"; - reset-gpio = <&tlmm 99 GPIO_ACTIVE_HIGH>; - irq-gpio = <&tlmm 125 GPIO_TRANSITORY>; touchscreen-size-x = <1080>; touchscreen-size-y = <2160>; - focaltech,max-touch-number = <5>; }; }; @@ -460,6 +459,19 @@ &i2c10 { /* SMB1355@0x0C */ }; +&i2c11 { + status = "okay"; + clock-frequency = <400000>; + + tfa9890_codec: audio-codec@34 { + compatible = "nxp,tfa9890"; + reg = <0x34>; + vddd-supply = <&vreg_s4a_1p8>; + sound-name-prefix = "Speaker"; + #sound-dai-cells = <0>; + }; +}; + &ipa { qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; @@ -485,7 +497,7 @@ panel@0 { #address-cells = <1>; #size-cells = <0>; - reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sde_dsi_active &sde_te_active>; @@ -532,6 +544,18 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_fg { + status = "okay"; + monitored-battery = <&battery>; + power-supplies = <&pmi8998_charger>; +}; + +&pmi8998_haptics { + status = "okay"; + + qcom,wave-play-rate-us = <4255>; +}; + &pm8998_resin { linux,code = ; status = "okay"; @@ -586,6 +610,103 @@ led-1 { }; }; +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; +}; + +&q6afedai { + qi2s@22 { + reg = <22>; + qcom,sd-lines = <0>; + }; +}; + +&q6asmdai { + dai@0 { + reg = <0>; + }; + + dai@1 { + reg = <1>; + }; + + dai@2 { + reg = <2>; + }; + + dai@3 { + reg = <3>; + }; + + dai@4 { + reg = <4>; + }; + + dai@5 { + reg = <5>; + }; +}; + +/* + * Prevent garbage data on bluetooth UART lines + */ +&qup_uart6_default { + pinmux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "qup6"; + }; + + cts { + pins = "gpio45"; + bias-pull-down; + }; + + rts-tx { + pins = "gpio46", "gpio47"; + drive-strength = <2>; + bias-disable; + }; + + rx { + pins = "gpio48"; + bias-pull-up; + }; +}; + +/* + * Prevent garbage data on bluetooth UART lines + */ +&qup_uart6_default { + pinmux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "qup6"; + }; + + cts { + pins = "gpio45"; + bias-pull-down; + }; + + rts-tx { + pins = "gpio46", "gpio47"; + drive-strength = <2>; + bias-disable; + }; + + rx { + pins = "gpio48"; + bias-pull-up; + }; +}; + &qup_uart9_rx { drive-strength = <2>; bias-pull-up; @@ -604,14 +725,219 @@ &qupv3_id_1 { status = "okay"; }; +&sdhc_2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; + + vmmc-supply = <&vreg_l21a_2p95>; + vqmmc-supply = <&vreg_l13a_2p95>; + + bus-width = <4>; + /* card detection is broken, but because the battery must be removed + * to insert the card, we use this rather than the broken-cd property + * which would just waste CPU cycles polling. + */ + non-removable; +}; + &slpi_pas { firmware-name = "qcom/sdm845/axolotl/slpi.mbn"; status = "okay"; }; +&sound { + model = "SHIFT6mq"; + compatible = "qcom,sdm845-sndcard"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>; + pinctrl-names = "default"; + + audio-routing = "RX_BIAS", "MCLK", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "AMIC3", "MIC BIAS3", + "MM_DL1", "MultiMedia1 Playback", + "MM_DL3", "MultiMedia3 Playback", + "MM_DL5", "MultiMedia5 Playback", + "MultiMedia2 Capture", "MM_UL2", + "MultiMedia4 Capture", "MM_UL4", + "MultiMedia6 Capture", "MM_UL6"; + + mm1-dai-link { + link-name = "MultiMedia1"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + }; + }; + + mm2-dai-link { + link-name = "MultiMedia2"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + }; + }; + + mm3-dai-link { + link-name = "MultiMedia3"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + mm4-dai-link { + link-name = "MultiMedia4"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; + }; + }; + + mm5-dai-link { + link-name = "MultiMedia5"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA5>; + }; + }; + + mm6-dai-link { + link-name = "MultiMedia6"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA6>; + }; + }; + + speaker-dai-link { + link-name = "Speaker Playback"; + codec { + sound-dai = <&tfa9890_codec>; + }; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap-wcd-dai-link { + link-name = "SLIM WCD Capture 1"; + codec { + sound-dai = <&wcd9340 1>; /* AIF1_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_1_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slim-dai-link { + link-name = "SLIM WCD Playback 1"; + codec { + sound-dai = <&wcd9340 0>; /* AIF1_PB */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_0_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap-dai-link { + link-name = "SLIM WCD Capture 2"; + codec { + sound-dai = <&wcd9340 3>; /* AIF2_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_0_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slim-wcd-dai-link { + link-name = "SLIM WCD Playback 2"; + codec { + sound-dai = <&wcd9340 2>; /* AIF2_PB */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_1_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap2-wcd-dai-link { + link-name = "SLIM WCD Capture 3"; + codec { + sound-dai = <&wcd9340 5>; /* AIF3_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_2_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + voicemmode1-dai-link { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; +}; + &tlmm { gpio-reserved-ranges = <0 4>, <81 4>; + sdc2_default_state: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + + /* + * It seems that mmc_test reports errors if drive + * strength is not 16 on clk, cmd, and data pins. + */ + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + }; + + sdc2_card_det_n: sd-card-det-n-state { + pins = "gpio126"; + function = "gpio"; + bias-pull-up; + }; + sde_dsi_active: sde-dsi-active-state { pins = "gpio6", "gpio11"; function = "gpio"; @@ -739,6 +1065,22 @@ &venus { firmware-name = "qcom/sdm845/axolotl/venus.mbn"; }; +&wcd9340 { + pinctrl-0 = <&wcd_intr_default>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; + vdd-buck-supply = <&vreg_s4a_1p8>; + vdd-buck-sido-supply = <&vreg_s4a_1p8>; + vdd-tx-supply = <&vreg_s4a_1p8>; + vdd-rx-supply = <&vreg_s4a_1p8>; + vdd-io-supply = <&vreg_s4a_1p8>; + + qcom,micbias1-microvolt = <2700000>; + qcom,micbias2-microvolt = <2700000>; + qcom,micbias3-microvolt = <2700000>; + qcom,micbias4-microvolt = <2700000>; +}; + &wifi { status = "okay"; @@ -749,4 +1091,5 @@ &wifi { vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; + qcom,ath10k-calibration-variant = "shift_axolotl"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi index b02a1dc5fec..c4845b0e3b1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi @@ -118,12 +118,6 @@ vreg_s4a_1p8: pm8998-smps4 { }; reserved-memory { - /* SONY was cool and didn't diverge from MTP this time, yay! */ - cont_splash_mem: memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x2400000>; - no-map; - }; - ramoops@ffc00000 { compatible = "ramoops"; reg = <0x0 0xffc00000 0x0 0x100000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi index 617b17b2d7d..e2ffd4b31b0 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi @@ -7,6 +7,9 @@ #include #include #include +#include +#include +#include #include "sdm845.dtsi" #include "sdm845-wcd9340.dtsi" #include "pm8998.dtsi" @@ -35,9 +38,14 @@ / { qcom,msm-id = <321 0x20001>; aliases { + serial0 = &uart9; serial1 = &uart6; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + gpio-keys { compatible = "gpio-keys"; autorepeat; @@ -99,12 +107,6 @@ spss_mem: memory@97f00000 { no-map; }; - /* Cont splash region set up by the bootloader */ - cont_splash_mem: framebuffer@9d400000 { - reg = <0 0x9d400000 0 0x2400000>; - no-map; - }; - rmtfs_mem: memory@f6301000 { compatible = "qcom,rmtfs-mem"; reg = <0 0xf6301000 0 0x200000>; @@ -243,6 +245,14 @@ &gmu { status = "okay"; }; +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + &gpu { status = "okay"; @@ -264,7 +274,7 @@ &ibb { &lab { regulator-min-microvolt = <4600000>; regulator-max-microvolt = <6000000>; - regulator-over-current-protection; + // regulator-over-current-protection; regulator-pull-down; regulator-soft-start; }; @@ -318,6 +328,26 @@ &ipa { status = "okay"; }; +&i2c5 { + #dma-cells = <3>; + status="okay"; + + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + + /*smart PA*/ + tas2559_codec: tas2559@4c{ + #sound-dai-cells = <1>; + compatible = "ti,tas2559"; + reg = <0x4c>; + ti,tas2559-reset-gpio = <&tlmm 12 0>; + ti,tas2560-reset-gpio = <&tlmm 76 0>; + ti,tas2559-addr = <0x4c>; + ti,tas2560-addr = <0x4d>; + }; +}; + &pm8998_gpios { vol_up_pin_a: vol-up-active-state { pins = "gpio6"; @@ -377,6 +407,13 @@ led-1 { }; }; +&pmi8998_fg { + status = "okay"; + + power-supplies = <&pmi8998_charger>; + monitored-battery = <&battery>; +}; + &pm8998_resin { linux,code = ; status = "okay"; @@ -402,12 +439,47 @@ dai@1 { dai@2 { reg = <2>; }; + + dai@3 { + reg = <3>; + }; +}; + +&pmi8998_haptics { + status = "okay"; + qcom,wave-play-rate-us = <4878>; +}; + +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; }; &qupv3_id_0 { status = "okay"; }; +&qupv3_id_1 { + status = "okay"; +}; + +&qup_uart9_rx { + drive-strength = <2>; + bias-pull-up; +}; + +&qup_uart9_tx { + drive-strength = <2>; + bias-disable; +}; + &sdhc_2 { status = "okay"; @@ -436,21 +508,50 @@ &sound { mm1-dai-link { link-name = "MultiMedia1"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; }; }; mm2-dai-link { link-name = "MultiMedia2"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; }; }; mm3-dai-link { link-name = "MultiMedia3"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + mm4-dai-link { + link-name = "MultiMedia4"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; + }; + }; + + dai-link-voicemmode1 { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; + + tas2559-dai-link { + link-name = "Primary Spkr Playback"; + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&tas2559_codec 0>; }; }; @@ -470,7 +571,7 @@ codec { }; slimcap-dai-link { - link-name = "SLIM Capture"; + link-name = "SLIM WCD Capture"; cpu { sound-dai = <&q6afedai SLIMBUS_0_TX>; }; @@ -480,7 +581,22 @@ platform { }; codec { - sound-dai = <&wcd9340 1>; + sound-dai = <&wcd9340 1>; /* AIF1_CAP */ + }; + }; + + slimcap2-dai-link { + link-name = "SLIM WCD Capture 2"; + cpu { + sound-dai = <&q6afedai SLIMBUS_1_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&wcd9340 3>; /* AIF2_CAP */ }; }; }; @@ -513,6 +629,37 @@ sdc2_card_det_n: sd-card-det-n-state { function = "gpio"; bias-pull-up; }; + + ts_int_default: ts-int-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <16>; + bias-pull-down; + input-enable; + }; + + ts_reset_default: ts-reset-default-state { + pins = "gpio32"; + function = "gpio"; + drive-strength = <16>; + output-high; + }; + + ts_int_sleep: ts-int-sleep-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + + ts_reset_sleep: ts-reset-sleep-state { + pins = "gpio32"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; }; &uart6 { @@ -531,6 +678,11 @@ bluetooth { }; }; +&uart9 { + label = "LS-UART1"; + status = "okay"; +}; + &ufs_mem_hc { status = "okay"; @@ -601,4 +753,13 @@ &wifi { vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; + + qcom,snoc-host-cap-skip-quirk; + qcom,ath10k-calibration-variant = "xiaomi_beryllium"; +}; + + +&slpi_pas { + firmware-name = "qcom/sdm845/beryllium/slpi.mbn"; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts index 76931ebad06..74b4284b5f5 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts @@ -13,3 +13,24 @@ &display_panel { compatible = "ebbg,ft8719"; status = "okay"; }; + +&i2c14 { + status = "okay"; + + touchscreen@38 { + compatible = "focaltech,ft8719"; + reg = <0x38>; + + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + + iovcc-supply = <&vreg_l14a_1p8>; + + pinctrl-0 = <&ts_int_default &ts_reset_default>; + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; + pinctrl-names = "default", "sleep"; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <2246>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts index e9427851eba..0ca1997f934 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts @@ -13,3 +13,24 @@ &display_panel { compatible = "tianma,fhd-video", "novatek,nt36672a"; status = "okay"; }; + +&i2c14 { + status = "okay"; + + touchscreen@1 { + compatible = "novatek,nvt-ts"; + reg = <0x01>; + + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + + iovcc-supply = <&vreg_l14a_1p8>; + + pinctrl-0 = <&ts_int_default &ts_reset_default>; + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; + pinctrl-names = "default", "sleep"; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <2246>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts index e386b504e97..8df61887e3d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts @@ -711,5 +711,6 @@ &wifi { vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; + qcom,snoc-host-cap-skip-quirk; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 2f20be99ee7..9842d2d3983 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -888,6 +888,11 @@ mdata_mem: mpss-metadata { no-map; }; + cont_splash_mem: framebuffer@9d400000 { + reg = <0 0x9d400000 0 0x2400000>; + no-map; + }; + fastrpc_mem: fastrpc { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; @@ -974,6 +979,32 @@ q6routing: routing { #sound-dai-cells = <0>; }; }; + + q6mvm: apr-service@9 { + compatible = "qcom,q6mvm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + + q6voicedai: dais { + compatible = "qcom,q6voice-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6cvs: apr-service@a { + compatible = "qcom,q6cvs"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + }; + + q6cvp: apr-service@b { + compatible = "qcom,q6cvp"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + }; }; fastrpc { @@ -2681,6 +2712,11 @@ crypto: crypto@1dfa000 { <&apps_smmu 0x706 0x1>, <&apps_smmu 0x714 0x1>, <&apps_smmu 0x716 0x1>; + + /* FIXME: disabled due to a regression causing + * a trap to TZ and a hard reset if this device + * is used. */ + status = "disabled"; }; ipa: ipa@1e40000 { @@ -4443,6 +4479,8 @@ mdss: display-subsystem@ae00000 { power-domains = <&dispcc MDSS_GDSC>; + //resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; clock-names = "iface", "core"; diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts index 47dc42f6e93..47a28baa0ec 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -37,6 +37,10 @@ aliases { serial1 = &uart6; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + gpio-keys { compatible = "gpio-keys"; @@ -370,6 +374,33 @@ zap-shader { &i2c1 { status = "okay"; clock-frequency = <400000>; + + embedded-controller@70 { + compatible = "lenovo,yoga-c630-ec"; + reg = <0x70>; + + interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&ec_int_state>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "source"; + data-role = "host"; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "source"; + data-role = "host"; + }; + }; }; &i2c3 { @@ -567,6 +598,11 @@ dai@2 { }; }; +&slpi_pas { + firmware-name = "qcom/sdm850/LENOVO/81JL/qcslpi850.mbn"; + status = "okay"; +}; + &sound { compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard"; model = "Lenovo-YOGA-C630-13Q50"; @@ -694,6 +730,14 @@ mode_pin_active: mode-pin-state { bias-disable; }; + + ec_int_state: ec-int-state { + pins = "gpio20"; + function = "gpio"; + + input-enable; + bias-disable; + }; }; &uart6 { diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts index 26217836c27..bec0033aeca 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts @@ -61,12 +61,6 @@ aliases { /* Reserved memory changes */ reserved-memory { - /* Bootloader display framebuffer region */ - cont_splash_mem: memory@80400000 { - reg = <0x0 0x80400000 0x0 0x960000>; - no-map; - }; - qseecom_mem: memory@8b500000 { reg = <0 0x8b500000 0 0xa00000>; no-map; diff --git a/arch/arm64/boot/dts/qcom/sdm850.dtsi b/arch/arm64/boot/dts/qcom/sdm850.dtsi index da9f6fbe32f..89eda97daa5 100644 --- a/arch/arm64/boot/dts/qcom/sdm850.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm850.dtsi @@ -7,6 +7,17 @@ #include "sdm845.dtsi" +/delete-node/ &cont_splash_mem; + +/ { + reserved-memory { + cont_splash_mem: framebuffer@80400000 { + reg = <0x0 0x80400000 0x0 0x960000>; + no-map; + }; + }; +}; + &cpu4_opp_table { cpu4_opp33: opp-2841600000 { opp-hz = /bits/ 64 <2841600000>; diff --git a/arch/arm64/configs/sdm845.config b/arch/arm64/configs/sdm845.config new file mode 100644 index 00000000000..eb072b1b45a --- /dev/null +++ b/arch/arm64/configs/sdm845.config @@ -0,0 +1,1005 @@ +# Qualcomm Snapdragon 845 (SDM845) config fragment +CONFIG_LOCALVERSION="-sdm845" + +# OnePlus 6 +CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y +CONFIG_BATTERY_BQ27XXX=m +CONFIG_HID_RMI=m +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_F55=y + +# OnePlus 6T +CONFIG_DRM_PANEL_SAMSUNG_S6E3FC2X01=y +CONFIG_SND_SOC_TFA98XX=m + +# Pocophone F1 +CONFIG_DRM_PANEL_NOVATEK_NT36672A=y +CONFIG_DRM_PANEL_EBBG_FT8719=y +CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS=m +CONFIG_QCOM_GPI_DMA=m +CONFIG_SND_SOC_TAS2559=m + +# Samsung S9 SM-G9600(starqltechn) +CONFIG_TOUCHSCREEN_S6SY761=m +CONFIG_REGULATOR_S2DOS05=m + +# SHIFT6mq +CONFIG_DRM_PANEL_VISIONOX_RM69299_SHIFT=y +CONFIG_SND_SOC_TFA989X=m + +# Pixel 3 +CONFIG_DRM_PANEL_LG_SW43408=y + +# Odin +# Driver has been dropped +CONFIG_DRM_PANEL_INNOLUX_TD4328=y + +# Mi Mix 2S +CONFIG_DRM_PANEL_NOVATEK_NT35596S=y + +# C630 +CONFIG_DRM_TI_SN65DSI86=y +CONFIG_DRM_PANEL_EDP=y +CONFIG_PHY_QCOM_EDP=y +CONFIG_I2C_HID_OF_ELAN=m +CONFIG_BACKLIGHT_PWM=y +CONFIG_LENOVO_YOGA_C630_EC=m + +# SOC +CONFIG_FORCE_NR_CPUS=y +CONFIG_NR_CPUS=8 +CONFIG_SCSI_UFS_QCOM=y +CONFIG_QCOM_GSBI=y +CONFIG_QCOM_LLCC=y +CONFIG_QCOM_OCMEM=y +CONFIG_QCOM_RMTFS_MEM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_WCNSS_CTRL=y +CONFIG_QCOM_APR=y +CONFIG_POWER_RESET_QCOM_PON=y +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_LMH=y +CONFIG_SCHED_CLUSTER=y +CONFIG_SND_SOC_QDSP6_Q6VOICE=m +CONFIG_SCSI_UFS_BSG=y +CONFIG_PHY_QCOM_QMP_PCIE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_INTERCONNECT_QCOM_OSM_L3=y +# Notification LED +# Must be builtin as it won't be automatically modprobed +CONFIG_LEDS_TRIGGER_PATTERN=y +CONFIG_LEDS_CLASS_MULTICOLOR=m +CONFIG_LEDS_QCOM_LPG=m +CONFIG_I2C_QCOM_GENI=y + +# Flash LED +CONFIG_LEDS_QCOM_FLASH=m + +# Touchscreen - Pocophone F1 / SHIFT6mq +CONFIG_TOUCHSCREEN_EDT_FT5X06=m + +# Remoteproc +CONFIG_SLIMBUS=y +CONFIG_SLIM_QCOM_CTRL=y +CONFIG_SLIM_QCOM_NGD_CTRL=y +CONFIG_REMOTEPROC_CDEV=y + +# Battery +CONFIG_BATTERY_QCOM_FG=m +CONFIG_CHARGER_QCOM_SMB2=m +CONFIG_QCOM_SPMI_RRADC=m + +# Graphics +CONFIG_DRM=y +CONFIG_FB_SIMPLE=y +CONFIG_DRM_MSM=y +# Virtual video test driver +CONFIG_VIDEO_VIVID=m + +# Brightness Control +CONFIG_REGULATOR_QCOM_LABIBB=y +CONFIG_BACKLIGHT_QCOM_WLED=y + +# Haptics +CONFIG_FF_MEMLESS=y +CONFIG_INPUT_QCOM_SPMI_HAPTICS=m + +# Power management +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y + +# MGLRU +CONFIG_LRU_GEN=y +CONFIG_LRU_GEN_ENABLED=y + +# Misc useful things +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_DMABUF_HEAPS=y +CONFIG_UDMABUF=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_HZ_1000=y +CONFIG_MODULE_COMPRESS_ZSTD=y +# Alpine can't seem to handle this +CONFIG_MODULE_DECOMPRESS=y + +# Usage clamping (scale CPU for specific tasks) +CONFIG_UCLAMP_TASK=y +CONFIG_UCLAMP_TASK_GROUP=y + +# Needed for mounting userdata on android +CONFIG_QFMT_V2=y + +# HID/Input +CONFIG_I2C_HID=y +CONFIG_HID_GENERIC=m +CONFIG_UHID=m +CONFIG_USB_HID=m +CONFIG_INPUT_EVDEV=y +CONFIG_BT_HIDP=m +CONFIG_INPUT_JOYDEV=m + +# Persistent store +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_PSTORE_RAM=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y + +# USB +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_F_HID=y + +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_ACTIVITY=y + +# Platform +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# Causes issues with u-boot +CONFIG_FB_EFI=n + +# sm8250 +CONFIG_INTERCONNECT_QCOM_SM8250=y +CONFIG_PHY_QCOM_QMP_USB=y + +# debugging +CONFIG_FTRACE=y +CONFIG_BOOTTIME_TRACING=y +CONFIG_DYNAMIC_DEBUG=y + +# Qcom stuff +CONFIG_RPMSG_CHAR=y +CONFIG_QCOM_Q6V5_ADSP=m +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_QCOM_COINCELL=m +CONFIG_QCOM_FASTRPC=m +CONFIG_QCOM_SPMI_VADC=y +CONFIG_QCOM_SPMI_ADC5=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_QUSB2=y +CONFIG_PHY_QCOM_QMP_UFS=y +CONFIG_TYPEC=y +CONFIG_PHY_QCOM_QMP_COMBO=y +CONFIG_LEDS_CLASS_FLASH=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_WESTWOOD=y +CONFIG_DEFAULT_WESTWOOD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_F2FS_FS=y +CONFIG_NLS_UTF8=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_EXFAT_FS=m +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_SYN_COOKIES=y +CONFIG_UEVENT_HELPER=y +CONFIG_INPUT_UINPUT=m +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# Qcomlt +CONFIG_BLK_INLINE_ENCRYPTION=y +CONFIG_QCOM_QMI_COOLING=m +CONFIG_PHY_QCOM_SNPS_EUSB2=m +CONFIG_MFD_QCOM_QCA639X=y +CONFIG_MFD_QCOM_RPM=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_REPEATER=y +CONFIG_SCSI_UFS_CRYPTO=y +CONFIG_PHY_QCOM_USB_HS=y +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y +CONFIG_INTERCONNECT_QCOM_SM6115=y +CONFIG_SM_DISPCC_6115=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_DMA_CMA=y +CONFIG_SM_GPUCC_6115=y +CONFIG_USB_ONBOARD_HUB=n # Breaks USB on rb2 +CONFIG_INTERCONNECT_QCOM_QCM2290=y + +# Anbox +CONFIG_BRIDGE_NETFILTER=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX_DIAG=y +CONFIG_NETLINK_DIAG=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_ASHMEM=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y + +# Waydroid +CONFIG_PSI=y + +# WLAN debugging +CONFIG_ATH10K_DEBUG=y +CONFIG_ATH10K_DEBUGFS=y +CONFIG_ATH10K_SPECTRAL=y + +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_MULTIQ=y + +# Debugging stuff +CONFIG_STACKTRACE=y + +#pmOS Related +CONFIG_VT=y +CONFIG_CRYPTO_XTS=y +CONFIG_TMPFS_XATTR=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_BINFMT_MISC=m +CONFIG_NLS_ASCII=y +# CONFIG_USB_MASS_STORAGE is not set + +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_CT=m +CONFIG_NFT_COUNTER=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_NAT=m +CONFIG_NFT_REJECT=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NF_TABLES_IPV6=y +CONFIG_SND_USB_AUDIO=m +CONFIG_CIFS=y + +CONFIG_DRM_GUD=m +CONFIG_UCLAMP_TASK=y +CONFIG_UCLAMP_TASK_GROUP=y + +# pmos containers kconfig +CONFIG_CGROUP_FREEZER=y +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_DUMMY=m +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_VS=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_DM_THIN_PROVISIONING=y +CONFIG_VXLAN=m +CONFIG_CGROUP_NET_PRIO=y +CONFIG_IPVLAN=m + +# pmOS ZRAM kconfig +CONFIG_ZSMALLOC=m +CONFIG_ZSMALLOC_STAT=y +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_ZSTD=y +CONFIG_ZRAM_DEF_COMP="zstd" +CONFIG_ZRAM_MEMORY_TRACKING=y +CONFIG_ZRAM_MULTI_COMP=y +CONFIG_CRYPTO_LZ4=m +CONFIG_LZ4_COMPRESS=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_ZSTD=m + +# pmOS iwd kconfig +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_CRYPTO_KPP=y +CONFIG_PKCS8_PRIVATE_KEY_PARSER=y + +# pmOS wireguard kconfig +CONFIG_WIREGUARD=m +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_FIB_RULES=y + +# pmOS community kconfig +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m + +# LEDs +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# Game controllers, etc +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_NINTENDO=m + +# Disable all unrelated stuffs afaik +CONFIG_HIBERNATION=n +CONFIG_FW_LOADER_USER_HELPER=n +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=n +CONFIG_BLK_DEV_NVME=n +CONFIG_ATA=n +CONFIG_MTD=n +CONFIG_SRAM=n +CONFIG_MEGARAID_SAS=n +CONFIG_EEPROM_AT25=n +CONFIG_SCSI_MPT3SAS=n +CONFIG_BLK_DEV_MD=n +CONFIG_DM_MIRROR=n +CONFIG_DM_ZERO=n +CONFIG_EXT2_FS=n +CONFIG_EXT3_FS=n +CONFIG_USB_DWC2=n +CONFIG_USB_CHIPIDEA=n +CONFIG_USB_MUSB_HDRC=n +CONFIG_USB_ISP1760=n +CONFIG_USB_HSIC_USB3503=n +CONFIG_USB_NET_PLUSB=n +CONFIG_TYPEC_FUSB302=n +CONFIG_EXTCON_PTN5150=n +CONFIG_REALTEK_PHY=n +CONFIG_NET_VENDOR_NI=n +CONFIG_NET_9P=n +CONFIG_CAN=n +CONFIG_BNX2X=n +CONFIG_MACB=n +CONFIG_IGB=n +CONFIG_IGBVF=n +CONFIG_SMC91X=n +CONFIG_MLX4_EN=n +CONFIG_MLX5_CORE=n +CONFIG_STMMAC_ETH=n +CONFIG_ATL1C=n +CONFIG_BRCMFMAC=n +CONFIG_WL18XX=n +CONFIG_WLCORE=n +CONFIG_ATH10K_PCI=n +CONFIG_NET_SCH_CBS=n +CONFIG_NET_SCH_ETF=n +CONFIG_NET_SCH_TAPRIO=n +CONFIG_NET_SCH_MQPRIO=n +CONFIG_NET_CLS_BASIC=n +CONFIG_NET_CLS_FLOWER=n +CONFIG_NET_CLS_ACT=n +CONFIG_NET_ACT_GACT=n +CONFIG_NET_ACT_MIRRED=n +CONFIG_NET_ACT_GATE=n +CONFIG_MDIO_BUS_MUX_MMIOREG=n +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=n +CONFIG_SND_SOC_ES7134=n +CONFIG_SND_SOC_ES7241=n +CONFIG_SND_SOC_TAS571X=n +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=n +CONFIG_GPIO_DWAPB=n +CONFIG_COMMON_CLK_XGENE=n +CONFIG_SENSORS_ARM_SCPI=n +CONFIG_TCG_TPM=n +CONFIG_BATTERY_SBS=n +CONFIG_REGULATOR_VCTRL=n +CONFIG_SND_SOC_MAX98357A=n +CONFIG_SND_SOC_RL6231=n +CONFIG_THUNDER_NIC_BGX=n +CONFIG_THUNDER_NIC_RGX=n +CONFIG_MDIO_THUNDER=n +CONFIG_CAVIUM_ERRATUM_22375=n +CONFIG_CAVIUM_ERRATUM_23154=n +CONFIG_CAVIUM_ERRATUM_27456=n +CONFIG_CAVIUM_ERRATUM_30115=n +CONFIG_CAVIUM_TX2_ERRATUM_219=n +CONFIG_HW_RANDOM_CAVIUM=n +CONFIG_EEPROM_AT24=n +CONFIG_NET_DSA=n +CONFIG_AQUANTIA_PHY=n +CONFIG_MICROSEMI_PHY=n +CONFIG_VITESSE_PHY=n +CONFIG_I2C_MUX_PCA954x=n +CONFIG_SND_SOC_PCM3168A_I2C=n +CONFIG_SENSORS_LM90=n +CONFIG_SENSORS_INA2XX=n +CONFIG_RTC_DRV_DS3232=n +CONFIG_SPI_NXP_FLEXSPI=n +CONFIG_GPIO_MAX732X=n +CONFIG_SENSORS_ISL29018=n +CONFIG_MPL3115=n +CONFIG_MFD_ROHM_BD718XX=n +CONFIG_ARM_SBSA_WATCHDOG=n +CONFIG_ARM_SMC_WATCHDOG=n +CONFIG_REGULATOR_PCA9450=n +CONFIG_REGULATOR_PFUZE100=n +CONFIG_DRM_PANEL_RAYDIUM_RM67191=n +CONFIG_DRM_PANEL_SITRONIX_ST7703=n +CONFIG_PHY_MIXEL_MIPI_DPHY=n +CONFIG_DRM_NWL_MIPI_DSI=n +CONFIG_DRM_MXSFB=n +CONFIG_SND_SOC_FSL_SAI=n +CONFIG_SND_SOC_FSL_ASRC=n +CONFIG_SND_SOC_FSL_MICFIL=n +CONFIG_SND_SOC_FSL_AUDMIX=n +CONFIG_SND_SOC_FSL_SPDIF=n +CONFIG_SND_SOC_WM8904=n +CONFIG_RTC_DRV_RV8803=n +CONFIG_RTC_DRV_DS1307=n +CONFIG_RTC_DRV_PCF85363=n +CONFIG_RTC_DRV_PCF2127=n +CONFIG_PHY_FSL_IMX8MQ_USB=n +CONFIG_FUJITSU_ERRATUM_010001=n +CONFIG_PCI_PASID=n +CONFIG_UACCE=n +CONFIG_SPI_CADENCE_QUADSPI=n +CONFIG_DW_WATCHDOG=n +CONFIG_NOP_USB_XCEIV=n +CONFIG_SURFACE_PLATFORMS=n +CONFIG_GPIO_PCA953X=n +CONFIG_BACKLIGHT_LP855X=n +CONFIG_MFD_MAX77620=n +CONFIG_SENSORS_PWM_FAN=n +CONFIG_SENSORS_INA3221=n +CONFIG_REGULATOR_MAX8973=n +CONFIG_USB_CONN_GPIO=n +CONFIG_MICREL_PHY=n +CONFIG_MFD_BD9571MWV=n +CONFIG_DRM_PANEL_LVDS=n +CONFIG_DRM_RCAR_LVDS=n +CONFIG_COMMON_CLK_VC5=n +CONFIG_CRYPTO_DEV_CCREE=n +CONFIG_VIDEO_IMX219=n +CONFIG_VIDEO_OV5645=n +CONFIG_SND_SOC_AK4613=n +CONFIG_SND_SIMPLE_CARD=n +CONFIG_SND_SIMPLE_CARD_UTILS=n +CONFIG_SND_AUDIO_GRAPH_CARD=n +CONFIG_TYPEC_HD3SS3220=n +CONFIG_RTC_DRV_RX8581=n +CONFIG_COMMON_CLK_CS2000_CP=n +CONFIG_KEYBOARD_ADC=n +CONFIG_REGULATOR_FAN53555=n +CONFIG_TOUCHSCREEN_ATMEL_MXT=n +CONFIG_RTC_DRV_HYM8563=n +CONFIG_MFD_SEC_CORE=n +CONFIG_PL330_DMA=n +CONFIG_GPIO_MB86S7X=n +CONFIG_MMC_SDHCI_F_SDH30=n +CONFIG_MMC_SDHCI_CADENCE=n +CONFIG_SOCIONEXT_SYNQUACER_PREITS=n +CONFIG_NET_VENDOR_SOCIONEXT=n +CONFIG_ARCH_ACTIONS=n +CONFIG_ARCH_AGILEX=n +CONFIG_ARCH_N5X=n +CONFIG_ARCH_SUNXI=n +CONFIG_ARCH_ALPINE=n +CONFIG_ARCH_APPLE=n +CONFIG_ARCH_BCM2835=n +CONFIG_ARCH_BCM4908=n +CONFIG_ARCH_BCM_IPROC=n +CONFIG_ARCH_BERLIN=n +CONFIG_ARCH_BRCMSTB=n +CONFIG_ARCH_EXYNOS=n +CONFIG_ARCH_K3=n +CONFIG_ARCH_LAYERSCAPE=n +CONFIG_ARCH_LG1K=n +CONFIG_ARCH_HISI=n +CONFIG_ARCH_KEEMBAY=n +CONFIG_ARCH_MEDIATEK=n +CONFIG_ARCH_MESON=n +CONFIG_ARCH_MVEBU=n +CONFIG_ARCH_MXC=n +CONFIG_ARCH_RENESAS=n +CONFIG_ARCH_ROCKCHIP=n +CONFIG_ARCH_S32=n +CONFIG_ARCH_SEATTLE=n +CONFIG_ARCH_INTEL_SOCFPGA=n +CONFIG_ARCH_SYNQUACER=n +CONFIG_ARCH_TEGRA=n +CONFIG_ARCH_SPRD=n +CONFIG_ARCH_THUNDER=n +CONFIG_ARCH_THUNDER2=n +CONFIG_ARCH_UNIPHIER=n +CONFIG_ARCH_VEXPRESS=n +CONFIG_ARCH_VISCONTI=n +CONFIG_ARCH_XGENE=n +CONFIG_ARCH_ZX=n +CONFIG_ARCH_ZYNQMP=n +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=n +CONFIG_ARM_ARMADA_37XX_CPUFREQ=n +CONFIG_ARM_IMX_CPUFREQ_DT=n +CONFIG_ARM_RASPBERRYPI_CPUFREQ=n +CONFIG_ARM_TEGRA186_CPUFREQ=n +CONFIG_QORIQ_CPUFREQ=n +CONFIG_RASPBERRYPI_FIRMWARE=n +CONFIG_INTEL_STRATIX10_SERVICE=n +CONFIG_INTEL_STRATIX10_RSU=n +CONFIG_IMX_SCU=n +CONFIG_IMX_SCU_PD=n +CONFIG_CAN_RCAR=n +CONFIG_CAN_RCAR_CANFD=n +CONFIG_CAN_FLEXCAN=n +CONFIG_PCI_AARDVARK=n +CONFIG_PCI_TEGRA=n +CONFIG_PCIE_RCAR_HOST=n +CONFIG_PCIE_RCAR_EP=n +CONFIG_PCI_XGENE=n +CONFIG_PCIE_ALTERA=n +CONFIG_PCIE_ALTERA_MSI=n +CONFIG_PCI_HOST_THUNDER_PEM=n +CONFIG_PCI_HOST_THUNDER_ECAM=n +CONFIG_PCIE_ROCKCHIP_HOST=n +CONFIG_PCIE_BRCMSTB=n +CONFIG_PCI_IMX6=n +CONFIG_PCI_LAYERSCAPE=n +CONFIG_PCIE_LAYERSCAPE_GEN4=n +CONFIG_PCI_HISI=n +CONFIG_PCIE_ARMADA_8K=n +CONFIG_PCIE_KIRIN=n +CONFIG_PCIE_HISI_STB=n +CONFIG_PCIE_TEGRA194_HOST=n +CONFIG_HISILICON_LPC=n +CONFIG_FSL_MC_BUS=n +CONFIG_TEGRA_ACONNECT=n +CONFIG_MTD_CFI_INTELEXT=n +CONFIG_MTD_CFI_AMDSTD=n +CONFIG_MTD_CFI_STAA=n +CONFIG_MTD_SST25L=n +CONFIG_MTD_NAND_DENALI_DT=n +CONFIG_MTD_NAND_MARVELL=n +CONFIG_MTD_NAND_FSL_IFC=n +CONFIG_SCSI_HISI_SAS=n +CONFIG_SCSI_HISI_SAS_PCI=n +CONFIG_SCSI_UFS_HISI=n +CONFIG_SCSI_UFS_EXYNOS=n +CONFIG_AHCI_CEVA=n +CONFIG_AHCI_MVEBU=n +CONFIG_AHCI_XGENE=n +CONFIG_AHCI_QORIQ=n +CONFIG_SATA_SIL24=n +CONFIG_SATA_RCAR=n +CONFIG_FSL_FMAN=n +CONFIG_FSL_DPAA_ETH=n +CONFIG_FSL_DPAA2_ETH=n +CONFIG_FSL_ENETC=n +CONFIG_FSL_ENETC_VF=n +CONFIG_FSL_ENETC_QOS=n +CONFIG_HIX5HD2_GMAC=n +CONFIG_HNS_DSAF=n +CONFIG_HNS_ENET=n +CONFIG_HNS3=n +CONFIG_HNS3_HCLGE=n +CONFIG_HNS3_ENET=n +CONFIG_SERIAL_MESON=n +CONFIG_SERIAL_MESON_CONSOLE=n +CONFIG_SERIAL_SAMSUNG=n +CONFIG_SERIAL_SAMSUNG_CONSOLE=n +CONFIG_SERIAL_TEGRA=n +CONFIG_SERIAL_TEGRA_TCU=n +CONFIG_SERIAL_IMX=n +CONFIG_SERIAL_IMX_CONSOLE=n +CONFIG_SERIAL_XILINX_PS_UART=n +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=n +CONFIG_SERIAL_FSL_LPUART=n +CONFIG_SERIAL_FSL_LPUART_CONSOLE=n +CONFIG_SERIAL_FSL_LINFLEXUART=n +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=n +CONFIG_SERIAL_MVEBU_UART=n +CONFIG_SERIAL_OWL=n +CONFIG_I2C_BCM2835=n +CONFIG_I2C_DESIGNWARE_PLATFORM=n +CONFIG_I2C_IMX=n +CONFIG_I2C_IMX_LPI2C=n +CONFIG_I2C_MESON=n +CONFIG_I2C_MT65XX=n +CONFIG_I2C_MV64XXX=n +CONFIG_I2C_OMAP=n +CONFIG_I2C_OWL=n +CONFIG_I2C_PXA=n +CONFIG_I2C_RK3X=n +CONFIG_I2C_SH_MOBILE=n +CONFIG_I2C_TEGRA=n +CONFIG_I2C_UNIPHIER_F=n +CONFIG_I2C_RCAR=n +CONFIG_SPI_ARMADA_3700=n +CONFIG_SPI_BCM2835=n +CONFIG_SPI_BCM2835AUX=n +CONFIG_SPI_DESIGNWARE=n +CONFIG_SPI_DW_DMA=n +CONFIG_SPI_DW_MMIO=n +CONFIG_SPI_FSL_LPSPI=n +CONFIG_SPI_FSL_QUADSPI=n +CONFIG_SPI_IMX=n +CONFIG_SPI_FSL_DSPI=n +CONFIG_SPI_MESON_SPICC=n +CONFIG_SPI_MESON_SPIFC=n +CONFIG_SPI_ORION=n +CONFIG_SPI_PL022=n +CONFIG_SPI_ROCKCHIP=n +CONFIG_SPI_RPCIF=n +CONFIG_SPI_S3C64XX=n +CONFIG_SPI_SH_MSIOF=n +CONFIG_SPI_SUN6I=n +CONFIG_PINCTRL_MAX77620=n +CONFIG_PINCTRL_OWL=n +CONFIG_PINCTRL_S700=n +CONFIG_PINCTRL_S900=n +CONFIG_PINCTRL_IMX8MM=n +CONFIG_PINCTRL_IMX8MN=n +CONFIG_PINCTRL_IMX8MP=n +CONFIG_PINCTRL_IMX8MQ=n +CONFIG_PINCTRL_IMX8QM=n +CONFIG_PINCTRL_IMX8QXP=n +CONFIG_PINCTRL_IMX8DXL=n +CONFIG_GPIO_ALTERA=n +CONFIG_GPIO_DAVINCI=n +CONFIG_GPIO_MPC8XXX=n +CONFIG_GPIO_MXC=n +CONFIG_GPIO_PL061=n +CONFIG_GPIO_RCAR=n +CONFIG_GPIO_UNIPHIER=n +CONFIG_GPIO_VISCONTI=n +CONFIG_GPIO_XGENE=n +CONFIG_GPIO_XGENE_SB=n +CONFIG_GPIO_PCA953X_IRQ=n +CONFIG_GPIO_BD9571MWV=n +CONFIG_GPIO_MAX77620=n +CONFIG_GPIO_SL28CPLD=n +CONFIG_ROCKCHIP_IODOMAIN=n +CONFIG_POWER_RESET_XGENE=n +CONFIG_POWER_RESET_SYSCON=n +CONFIG_GNSS_MTK_SERIAL=n +CONFIG_SENSORS_RASPBERRYPI_HWMON=n +CONFIG_SENSORS_SL28CPLD=n +CONFIG_QORIQ_THERMAL=n +CONFIG_SUN8I_THERMAL=n +CONFIG_IMX_SC_THERMAL=n +CONFIG_IMX8MM_THERMAL=n +CONFIG_ROCKCHIP_THERMAL=n +CONFIG_RCAR_THERMAL=n +CONFIG_RCAR_GEN3_THERMAL=n +CONFIG_ARMADA_THERMAL=n +CONFIG_BCM2711_THERMAL=n +CONFIG_BCM2835_THERMAL=n +CONFIG_BRCMSTB_THERMAL=n +CONFIG_EXYNOS_THERMAL=n +CONFIG_TEGRA_BPMP_THERMAL=n +CONFIG_TEGRA_SOCTHERM=n +CONFIG_UNIPHIER_THERMAL=n +CONFIG_SL28CPLD_WATCHDOG=n +CONFIG_ARM_SP805_WATCHDOG=n +CONFIG_S3C2410_WATCHDOG=n +CONFIG_SUNXI_WATCHDOG=n +CONFIG_IMX2_WDT=n +CONFIG_IMX_SC_WDT=n +CONFIG_MESON_GXBB_WATCHDOG=n +CONFIG_MESON_WATCHDOG=n +CONFIG_RENESAS_WDT=n +CONFIG_UNIPHIER_WATCHDOG=n +CONFIG_BCM2835_WDT=n +CONFIG_MFD_ALTERA_SYSMGR=n +CONFIG_MFD_AXP20X_I2C=n +CONFIG_MFD_AXP20X_RSB=n +CONFIG_MFD_EXYNOS_LPASS=n +CONFIG_MFD_HI6421_PMIC=n +CONFIG_MFD_HI655X_PMIC=n +CONFIG_MFD_MT6397=n +CONFIG_MFD_RK808=n +CONFIG_MFD_SL28CPLD=n +CONFIG_REGULATOR_AXP20X=n +CONFIG_REGULATOR_BD718XX=n +CONFIG_REGULATOR_BD9571MWV=n +CONFIG_REGULATOR_HI6421V530=n +CONFIG_REGULATOR_HI655X=n +CONFIG_REGULATOR_MAX77620=n +CONFIG_REGULATOR_MP8859=n +CONFIG_REGULATOR_MT6358=n +CONFIG_REGULATOR_MT6397=n +CONFIG_REGULATOR_PF8X00=n +CONFIG_REGULATOR_RK808=n +CONFIG_REGULATOR_S2MPS11=n +CONFIG_REGULATOR_TPS65132=n +CONFIG_IR_MESON=n +CONFIG_IR_SUNXI=n +CONFIG_MEDIA_ANALOG_TV_SUPPORT=n +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=n +CONFIG_MEDIA_SDR_SUPPORT=n +CONFIG_VIDEO_RCAR_CSI2=n +CONFIG_VIDEO_RCAR_VIN=n +CONFIG_VIDEO_SUN6I_CSI=n +CONFIG_VIDEO_SAMSUNG_S5P_JPEG=n +CONFIG_VIDEO_SAMSUNG_S5P_MFC=n +CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=n +CONFIG_VIDEO_RENESAS_FDP1=n +CONFIG_VIDEO_RENESAS_FCP=n +CONFIG_VIDEO_RENESAS_VSP1=n +CONFIG_SDR_PLATFORM_DRIVERS=n +CONFIG_VIDEO_RCAR_DRIF=n +CONFIG_DRM_I2C_NXP_TDA998X=n +CONFIG_DRM_MALI_DISPLAY=n +CONFIG_DRM_NOUVEAU=n +CONFIG_DRM_EXYNOS=n +CONFIG_DRM_EXYNOS5433_DECON=n +CONFIG_DRM_EXYNOS7_DECON=n +CONFIG_DRM_EXYNOS_DSI=n +CONFIG_DRM_EXYNOS_HDMI=n +CONFIG_DRM_EXYNOS_MIC=n +CONFIG_DRM_ROCKCHIP=n +CONFIG_ROCKCHIP_ANALOGIX_DP=n +CONFIG_ROCKCHIP_CDN_DP=n +CONFIG_ROCKCHIP_DW_HDMI=n +CONFIG_ROCKCHIP_DW_MIPI_DSI=n +CONFIG_ROCKCHIP_INNO_HDMI=n +CONFIG_ROCKCHIP_LVDS=n +CONFIG_DRM_RCAR_DU=n +CONFIG_DRM_RCAR_DW_HDMI=n +CONFIG_DRM_SUN4I=n +CONFIG_DRM_SUN6I_DSI=n +CONFIG_DRM_SUN8I_DW_HDMI=n +CONFIG_DRM_SUN8I_MIXER=n +CONFIG_DRM_TEGRA=n +CONFIG_DRM_PARADE_PS8640=n +CONFIG_DRM_SII902X=n +CONFIG_DRM_THINE_THC63LVD1024=n +CONFIG_DRM_VC4=n +CONFIG_DRM_ETNAVIV=n +CONFIG_DRM_HISI_HIBMC=n +CONFIG_DRM_HISI_KIRIN=n +CONFIG_DRM_MEDIATEK=n +CONFIG_DRM_MEDIATEK_HDMI=n +CONFIG_DRM_MESON=n +CONFIG_DRM_PL111=n +CONFIG_DRM_LIMA=n +CONFIG_DRM_PANFROST=n +CONFIG_SND_HDA_TEGRA=n +CONFIG_SND_HDA_CODEC_HDMI=n +CONFIG_SND_BCM2835_SOC_I2S=n +CONFIG_SND_SOC_FSL_EASRC=n +CONFIG_SND_IMX_SOC=n +CONFIG_SND_SOC_IMX_SGTL5000=n +CONFIG_SND_SOC_IMX_SPDIF=n +CONFIG_SND_SOC_IMX_AUDMIX=n +CONFIG_SND_SOC_FSL_ASOC_CARD=n +CONFIG_SND_MESON_AXG_SOUND_CARD=n +CONFIG_SND_MESON_GX_SOUND_CARD=n +CONFIG_SND_SOC_ROCKCHIP=n +CONFIG_SND_SOC_ROCKCHIP_SPDIF=n +CONFIG_SND_SOC_ROCKCHIP_RT5645=n +CONFIG_SND_SOC_RK3399_GRU_SOUND=n +CONFIG_SND_SOC_SAMSUNG=n +CONFIG_SND_SOC_RCAR=n +CONFIG_SND_SUN4I_I2S=n +CONFIG_SND_SUN4I_SPDIF=n +CONFIG_SND_SOC_TEGRA=n +CONFIG_SND_SOC_TEGRA210_AHUB=n +CONFIG_SND_SOC_TEGRA210_DMIC=n +CONFIG_SND_SOC_TEGRA210_I2S=n +CONFIG_SND_SOC_TEGRA186_DSPK=n +CONFIG_SND_SOC_TEGRA210_ADMAIF=n +CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=n +CONFIG_SND_SOC_GTM601=n +CONFIG_SND_SOC_RT5659=n +CONFIG_SND_SOC_WM8960=n +CONFIG_SND_SOC_WM8962=n +CONFIG_USB_XHCI_PCI_RENESAS=n +CONFIG_USB_XHCI_TEGRA=n +CONFIG_USB_EHCI_EXYNOS=n +CONFIG_USB_OHCI_EXYNOS=n +CONFIG_USB_RENESAS_USBHS_HCD=n +CONFIG_USB_RENESAS_USBHS=n +CONFIG_USB_CHIPIDEA_UDC=n +CONFIG_USB_CHIPIDEA_HOST=n +CONFIG_USB_RENESAS_USBHS_UDC=n +CONFIG_USB_RENESAS_USB3=n +CONFIG_USB_TEGRA_XUDC=n +CONFIG_MMC_SDHCI_OF_ARASAN=n +CONFIG_MMC_SDHCI_OF_ESDHC=n +CONFIG_MMC_SDHCI_ESDHC_IMX=n +CONFIG_MMC_SDHCI_TEGRA=n +CONFIG_MMC_MESON_GX=n +CONFIG_MMC_DW_EXYNOS=n +CONFIG_MMC_DW_HI3798CV200=n +CONFIG_MMC_DW_K3=n +CONFIG_MMC_DW_ROCKCHIP=n +CONFIG_MMC_SUNXI=n +CONFIG_MMC_BCM2835=n +CONFIG_MMC_MTK=n +CONFIG_MMC_SDHCI_XENON=n +CONFIG_MMC_SDHCI_AM654=n +CONFIG_MMC_OWL=n +CONFIG_RTC_DRV_MAX77686=n +CONFIG_RTC_DRV_RK808=n +CONFIG_RTC_DRV_M41T80=n +CONFIG_RTC_DRV_RV3028=n +CONFIG_RTC_DRV_S5M=n +CONFIG_RTC_DRV_FSL_FTM_ALARM=n +CONFIG_RTC_DRV_S3C=n +CONFIG_RTC_DRV_PL031=n +CONFIG_RTC_DRV_SUN6I=n +CONFIG_RTC_DRV_ARMADA38X=n +CONFIG_RTC_DRV_TEGRA=n +CONFIG_RTC_DRV_SNVS=n +CONFIG_RTC_DRV_IMX_SC=n +CONFIG_RTC_DRV_XGENE=n +CONFIG_DMA_BCM2835=n +CONFIG_DMA_SUN6I=n +CONFIG_FSL_EDMA=n +CONFIG_IMX_SDMA=n +CONFIG_K3_DMA=n +CONFIG_MV_XOR=n +CONFIG_MV_XOR_V2=n +CONFIG_OWL_DMA=n +CONFIG_TEGRA20_APB_DMA=n +CONFIG_TEGRA210_ADMA=n +CONFIG_RCAR_DMAC=n +CONFIG_RENESAS_USB_DMAC=n +CONFIG_TI_K3_UDMA=n +CONFIG_TI_K3_UDMA_GLUE_LAYER=n +CONFIG_COMMON_CLK_RK808=n +CONFIG_COMMON_CLK_FSL_SAI=n +CONFIG_COMMON_CLK_S2MPS11=n +CONFIG_COMMON_CLK_ZYNQMP=n +CONFIG_COMMON_CLK_BD718XX=n +CONFIG_CLK_RASPBERRYPI=n +CONFIG_CLK_IMX8MM=n +CONFIG_CLK_IMX8MN=n +CONFIG_CLK_IMX8MP=n +CONFIG_CLK_IMX8MQ=n +CONFIG_CLK_IMX8QXP=n +CONFIG_TI_SCI_CLK=n +CONFIG_IMX_MBOX=n +CONFIG_BCM2835_MBOX=n +CONFIG_ROCKCHIP_IOMMU=n +CONFIG_TEGRA_IOMMU_SMMU=n +CONFIG_MTK_IOMMU=n +CONFIG_OWL_PM_DOMAINS=n +CONFIG_RASPBERRYPI_POWER=n +CONFIG_FSL_DPAA=n +CONFIG_FSL_MC_DPIO=n +CONFIG_FSL_RCPM=n +CONFIG_MTK_PMIC_WRAP=n +CONFIG_ARCH_R8A774A1=n +CONFIG_ARCH_R8A774B1=n +CONFIG_ARCH_R8A774C0=n +CONFIG_ARCH_R8A774E1=n +CONFIG_ARCH_R8A77950=n +CONFIG_ARCH_R8A77951=n +CONFIG_ARCH_R8A77960=n +CONFIG_ARCH_R8A77961=n +CONFIG_ARCH_R8A77965=n +CONFIG_ARCH_R8A77970=n +CONFIG_ARCH_R8A77980=n +CONFIG_ARCH_R8A77990=n +CONFIG_ARCH_R8A77995=n +CONFIG_ARCH_R8A779A0=n +CONFIG_ARCH_R9A07G044=n +CONFIG_ROCKCHIP_PM_DOMAINS=n +CONFIG_ARCH_TEGRA_132_SOC=n +CONFIG_ARCH_TEGRA_210_SOC=n +CONFIG_ARCH_TEGRA_186_SOC=n +CONFIG_ARCH_TEGRA_194_SOC=n +CONFIG_ARCH_TEGRA_234_SOC=n +CONFIG_TI_SCI_PM_DOMAINS=n +CONFIG_ARM_IMX_BUS_DEVFREQ=n +CONFIG_ARM_IMX8M_DDRC_DEVFREQ=n +CONFIG_RENESAS_RPCIF=n +CONFIG_EXYNOS_ADC=n +CONFIG_MAX9611=n +CONFIG_ROCKCHIP_SARADC=n +CONFIG_PWM_BCM2835=n +CONFIG_PWM_IMX27=n +CONFIG_PWM_MESON=n +CONFIG_PWM_MTK_DISP=n +CONFIG_PWM_MEDIATEK=n +CONFIG_PWM_RCAR=n +CONFIG_PWM_ROCKCHIP=n +CONFIG_PWM_SAMSUNG=n +CONFIG_PWM_SL28CPLD=n +CONFIG_PWM_SUN4I=n +CONFIG_PWM_TEGRA=n +CONFIG_PWM_VISCONTI=n +CONFIG_SL28CPLD_INTC=n +CONFIG_RESET_IMX7=n +CONFIG_RESET_TI_SCI=n +CONFIG_PHY_XGENE=n +CONFIG_PHY_SUN4I_USB=n +CONFIG_PHY_HI6220_USB=n +CONFIG_PHY_HISTB_COMBPHY=n +CONFIG_PHY_HISI_INNO_USB2=n +CONFIG_PHY_MVEBU_CP110_COMPHY=n +CONFIG_PHY_MTK_TPHY=n +CONFIG_PHY_RCAR_GEN3_PCIE=n +CONFIG_PHY_RCAR_GEN3_USB2=n +CONFIG_PHY_RCAR_GEN3_USB3=n +CONFIG_PHY_ROCKCHIP_EMMC=n +CONFIG_PHY_ROCKCHIP_INNO_HDMI=n +CONFIG_PHY_ROCKCHIP_INNO_USB2=n +CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=n +CONFIG_PHY_ROCKCHIP_PCIE=n +CONFIG_PHY_ROCKCHIP_TYPEC=n +CONFIG_PHY_SAMSUNG_UFS=n +CONFIG_PHY_UNIPHIER_USB2=n +CONFIG_PHY_UNIPHIER_USB3=n +CONFIG_PHY_TEGRA_XUSB=n +CONFIG_FSL_IMX8_DDR_PMU=n +CONFIG_HISI_PMU=n +CONFIG_NVMEM_IMX_OCOTP=n +CONFIG_NVMEM_IMX_OCOTP_SCU=n +CONFIG_MTK_EFUSE=n +CONFIG_ROCKCHIP_EFUSE=n +CONFIG_NVMEM_SUNXI_SID=n +CONFIG_UNIPHIER_EFUSE=n +CONFIG_MESON_EFUSE=n +CONFIG_NVMEM_RMEM=n +CONFIG_FPGA=n +CONFIG_FPGA_MGR_STRATIX10_SOC=n +CONFIG_FPGA_BRIDGE=n +CONFIG_ALTERA_FREEZE_BRIDGE=n +CONFIG_FPGA_REGION=n +CONFIG_OF_FPGA_REGION=n +CONFIG_INTERCONNECT_IMX=n +CONFIG_INTERCONNECT_IMX8MQ=n +CONFIG_INTERCONNECT_QCOM_MSM8996=n +CONFIG_INTERCONNECT_QCOM_QCS404=n +CONFIG_ARCH_BCMBCA=n +CONFIG_ARCH_NPCM=n +CONFIG_SERIAL_BCM63XX=n +CONFIG_PINCTRL_SC8280XP=n +CONFIG_SC_GCC_8280XP=n +CONFIG_BCM_SBA_RAID=n +CONFIG_DMA_ENGINE_RAID=n +CONFIG_SENSORS_GPIO_FAN=n +CONFIG_ARCH_BCM=n +CONFIG_ARCH_NXP=n +CONFIG_NET_VENDOR_ADI=n +CONFIG_PINCTRL_SC8180X=n +CONFIG_SND_SOC_SC7180=n +CONFIG_SND_SOC_SC7280=n +CONFIG_SND_SOC_ADAU7002=n +CONFIG_SND_SOC_RT5682=n +CONFIG_SND_SOC_RT5682_I2C=n +CONFIG_SND_SOC_RT5682S=n +CONFIG_SND_SOC_WCD938X=n +CONFIG_SND_SOC_WCD938X_SDW=n +CONFIG_MMC_SDHCI_OF_DWCMSHC=n +CONFIG_IOMMU_IO_PGTABLE_DART=n +CONFIG_MEMORY_HOTPLUG=n +CONFIG_MELLANOX_PLATFORM=n diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index cb68adcabe0..67bd8956459 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -59,7 +59,7 @@ */ efi_signature_nop // special NOP to identity as PE/COFF executable b primary_entry // branch to kernel start, magic - .quad 0 // Image load offset from start of RAM, little-endian + le64sym _kernel_offset_le // Image load offset from start of RAM, little-endian le64sym _kernel_size_le // Effective size of kernel image, little-endian le64sym _kernel_flags_le // Informative flags, little-endian .quad 0 // reserved diff --git a/arch/arm64/kernel/image.h b/arch/arm64/kernel/image.h index 7bc3ba89790..0297e5d3e9a 100644 --- a/arch/arm64/kernel/image.h +++ b/arch/arm64/kernel/image.h @@ -62,6 +62,7 @@ */ #define HEAD_SYMBOLS \ DEFINE_IMAGE_LE64(_kernel_size_le, _end - _text); \ + DEFINE_IMAGE_LE64(_kernel_offset_le, 0x00080000); \ DEFINE_IMAGE_LE64(_kernel_flags_le, __HEAD_FLAGS); #endif /* __ARM64_KERNEL_IMAGE_H */ diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c index b84fdd17c3d..23beef9a62b 100644 --- a/drivers/clk/qcom/dispcc-sdm845.c +++ b/drivers/clk/qcom/dispcc-sdm845.c @@ -816,6 +816,7 @@ static struct clk_regmap *disp_cc_sdm845_clocks[] = { static const struct qcom_reset_map disp_cc_sdm845_resets[] = { [DISP_CC_MDSS_RSCC_BCR] = { 0x5000 }, + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, }; static struct gdsc *disp_cc_sdm845_gdscs[] = { diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 9874ff6d471..795001bb7ff 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -645,29 +645,56 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); /** - * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * mipi_dsi_compression_mode_ext() - enable/disable DSC on the peripheral * @dsi: DSI peripheral device * @enable: Whether to enable or disable the DSC + * @algo: Selected compression algorithm + * @pps_selector: Select PPS from the table of pre-stored or uploaded PPS entries * - * Enable or disable Display Stream Compression on the peripheral using the - * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * Enable or disable Display Stream Compression on the peripheral. * * Return: 0 on success or a negative error code on failure. */ -int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector) { - /* Note: Needs updating for non-default PPS or algorithm */ - u8 tx[2] = { enable << 0, 0 }; + u8 tx[2] = { }; struct mipi_dsi_msg msg = { .channel = dsi->channel, .type = MIPI_DSI_COMPRESSION_MODE, .tx_len = sizeof(tx), .tx_buf = tx, }; - int ret = mipi_dsi_device_transfer(dsi, &msg); + int ret; + + if (algo > 3 || pps_selector > 3) + return -EINVAL; + + tx[0] = (enable << 0) | + (algo << 1) | + (pps_selector << 4); + + ret = mipi_dsi_device_transfer(dsi, &msg); return (ret < 0) ? ret : 0; } +EXPORT_SYMBOL(mipi_dsi_compression_mode_ext); + +/** + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * @dsi: DSI peripheral device + * @enable: Whether to enable or disable the DSC + * + * Enable or disable Display Stream Compression on the peripheral using the + * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * + * Return: 0 on success or a negative error code on failure. + */ +int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +{ + return mipi_dsi_compression_mode_ext(dsi, enable, MIPI_DSI_COMPRESSION_DSC, 0); +} EXPORT_SYMBOL(mipi_dsi_compression_mode); /** diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index cf0b1de1c07..ff3ff6ab9dd 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2115,12 +2115,7 @@ static void a6xx_recover(struct msm_gpu *gpu) dev_pm_genpd_add_notifier(gmu->cxpd, &gmu->pd_nb); dev_pm_genpd_synced_poweroff(gmu->cxpd); - /* Drop the rpm refcount from active submits */ - if (active_submits) - pm_runtime_put(&gpu->pdev->dev); - - /* And the final one from recover worker */ - pm_runtime_put_sync(&gpu->pdev->dev); + pm_runtime_force_suspend(&gpu->pdev->dev); if (!wait_for_completion_timeout(&gmu->pd_gate, msecs_to_jiffies(1000))) DRM_DEV_ERROR(&gpu->pdev->dev, "cx gdsc didn't collapse\n"); @@ -2129,10 +2124,7 @@ static void a6xx_recover(struct msm_gpu *gpu) pm_runtime_use_autosuspend(&gpu->pdev->dev); - if (active_submits) - pm_runtime_get(&gpu->pdev->dev); - - pm_runtime_get_sync(&gpu->pdev->dev); + pm_runtime_force_resume(&gpu->pdev->dev); gpu->active_submits = active_submits; mutex_unlock(&gpu->active_lock); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 9a14d2232e4..6cc7dfe0093 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1200,6 +1200,8 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); phys->cached_mode = crtc_state->adjusted_mode; + if (phys->ops.atomic_mode_set) + phys->ops.atomic_mode_set(phys, crtc_state, conn_state); } } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 98d1b64a43e..53b95f66a82 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -69,6 +69,8 @@ struct dpu_encoder_phys; * @is_master: Whether this phys_enc is the current master * encoder. Can be switched at enable time. Based * on split_role and current mode (CMD/VID). + * @atomic_mode_set: DRM Call. Set a DRM mode. + * This likely caches the mode, for use at enable. * @enable: DRM Call. Enable a DRM mode. * @disable: DRM Call. Disable mode. * @control_vblank_irq Register/Deregister for VBLANK IRQ @@ -93,6 +95,9 @@ struct dpu_encoder_phys; struct dpu_encoder_phys_ops { void (*prepare_commit)(struct dpu_encoder_phys *encoder); bool (*is_master)(struct dpu_encoder_phys *encoder); + void (*atomic_mode_set)(struct dpu_encoder_phys *encoder, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state); void (*enable)(struct dpu_encoder_phys *encoder); void (*disable)(struct dpu_encoder_phys *encoder); int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index fc1d5736d7f..6b525475ae3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -142,6 +142,23 @@ static void dpu_encoder_phys_cmd_underrun_irq(void *arg) dpu_encoder_underrun_callback(phys_enc->parent, phys_enc); } +static void dpu_encoder_phys_cmd_atomic_mode_set( + struct dpu_encoder_phys *phys_enc, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + phys_enc->irq[INTR_IDX_CTL_START] = phys_enc->hw_ctl->caps->intr_start; + + phys_enc->irq[INTR_IDX_PINGPONG] = phys_enc->hw_pp->caps->intr_done; + + if (phys_enc->has_intf_te) + phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_intf->cap->intr_tear_rd_ptr; + else + phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_pp->caps->intr_rdptr; + + phys_enc->irq[INTR_IDX_UNDERRUN] = phys_enc->hw_intf->cap->intr_underrun; +} + static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( struct dpu_encoder_phys *phys_enc) { @@ -280,14 +297,6 @@ static void dpu_encoder_phys_cmd_irq_enable(struct dpu_encoder_phys *phys_enc) phys_enc->hw_pp->idx - PINGPONG_0, phys_enc->vblank_refcount); - phys_enc->irq[INTR_IDX_CTL_START] = phys_enc->hw_ctl->caps->intr_start; - phys_enc->irq[INTR_IDX_PINGPONG] = phys_enc->hw_pp->caps->intr_done; - - if (phys_enc->has_intf_te) - phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_intf->cap->intr_tear_rd_ptr; - else - phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_pp->caps->intr_rdptr; - dpu_core_irq_register_callback(phys_enc->dpu_kms, phys_enc->irq[INTR_IDX_PINGPONG], dpu_encoder_phys_cmd_pp_tx_done_irq, @@ -318,10 +327,6 @@ static void dpu_encoder_phys_cmd_irq_disable(struct dpu_encoder_phys *phys_enc) dpu_core_irq_unregister_callback(phys_enc->dpu_kms, phys_enc->irq[INTR_IDX_UNDERRUN]); dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, false); dpu_core_irq_unregister_callback(phys_enc->dpu_kms, phys_enc->irq[INTR_IDX_PINGPONG]); - - phys_enc->irq[INTR_IDX_CTL_START] = 0; - phys_enc->irq[INTR_IDX_PINGPONG] = 0; - phys_enc->irq[INTR_IDX_RDPTR] = 0; } static void dpu_encoder_phys_cmd_tearcheck_config( @@ -472,6 +477,14 @@ static void dpu_encoder_phys_cmd_enable(struct dpu_encoder_phys *phys_enc) return; } + phys_enc->irq[INTR_IDX_CTL_START] = phys_enc->hw_ctl->caps->intr_start; + phys_enc->irq[INTR_IDX_PINGPONG] = phys_enc->hw_pp->caps->intr_done; + + if (phys_enc->has_intf_te) + phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_intf->cap->intr_tear_rd_ptr; + else + phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_pp->caps->intr_rdptr; + dpu_encoder_phys_cmd_enable_helper(phys_enc); phys_enc->enable_state = DPU_ENC_ENABLED; } @@ -563,6 +576,10 @@ static void dpu_encoder_phys_cmd_disable(struct dpu_encoder_phys *phys_enc) ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx); } + phys_enc->irq[INTR_IDX_CTL_START] = 0; + phys_enc->irq[INTR_IDX_PINGPONG] = 0; + phys_enc->irq[INTR_IDX_RDPTR] = 0; + phys_enc->enable_state = DPU_ENC_DISABLED; } @@ -701,6 +718,7 @@ static void dpu_encoder_phys_cmd_init_ops( struct dpu_encoder_phys_ops *ops) { ops->is_master = dpu_encoder_phys_cmd_is_master; + ops->atomic_mode_set = dpu_encoder_phys_cmd_atomic_mode_set; ops->enable = dpu_encoder_phys_cmd_enable; ops->disable = dpu_encoder_phys_cmd_disable; ops->control_vblank_irq = dpu_encoder_phys_cmd_control_vblank_irq; @@ -739,8 +757,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(struct drm_device *dev, dpu_encoder_phys_cmd_init_ops(&phys_enc->ops); phys_enc->intf_mode = INTF_MODE_CMD; - phys_enc->irq[INTR_IDX_UNDERRUN] = phys_enc->hw_intf->cap->intr_underrun; - cmd_enc->stream_sel = 0; if (!phys_enc->hw_intf) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index d9e7dbf0499..0fe9d16df2d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -356,6 +356,16 @@ static bool dpu_encoder_phys_vid_needs_single_flush( return phys_enc->split_role != ENC_ROLE_SOLO; } +static void dpu_encoder_phys_vid_atomic_mode_set( + struct dpu_encoder_phys *phys_enc, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + phys_enc->irq[INTR_IDX_VSYNC] = phys_enc->hw_intf->cap->intr_vsync; + + phys_enc->irq[INTR_IDX_UNDERRUN] = phys_enc->hw_intf->cap->intr_underrun; +} + static int dpu_encoder_phys_vid_control_vblank_irq( struct dpu_encoder_phys *phys_enc, bool enable) @@ -699,6 +709,7 @@ static int dpu_encoder_phys_vid_get_frame_count( static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops) { ops->is_master = dpu_encoder_phys_vid_is_master; + ops->atomic_mode_set = dpu_encoder_phys_vid_atomic_mode_set; ops->enable = dpu_encoder_phys_vid_enable; ops->disable = dpu_encoder_phys_vid_disable; ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq; @@ -737,8 +748,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init(struct drm_device *dev, dpu_encoder_phys_vid_init_ops(&phys_enc->ops); phys_enc->intf_mode = INTF_MODE_VIDEO; - phys_enc->irq[INTR_IDX_VSYNC] = phys_enc->hw_intf->cap->intr_vsync; - phys_enc->irq[INTR_IDX_UNDERRUN] = phys_enc->hw_intf->cap->intr_underrun; DPU_DEBUG_VIDENC(phys_enc, "created intf idx:%d\n", p->hw_intf->idx); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c index 1924a2b28e5..8e84de412c6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -404,6 +404,15 @@ static void dpu_encoder_phys_wb_irq_disable(struct dpu_encoder_phys *phys) dpu_core_irq_unregister_callback(phys->dpu_kms, phys->irq[INTR_IDX_WB_DONE]); } +static void dpu_encoder_phys_wb_atomic_mode_set( + struct dpu_encoder_phys *phys_enc, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + + phys_enc->irq[INTR_IDX_WB_DONE] = phys_enc->hw_wb->caps->intr_wb_done; +} + static void _dpu_encoder_phys_wb_handle_wbdone_timeout( struct dpu_encoder_phys *phys_enc) { @@ -640,6 +649,7 @@ static bool dpu_encoder_phys_wb_is_valid_for_commit(struct dpu_encoder_phys *phy static void dpu_encoder_phys_wb_init_ops(struct dpu_encoder_phys_ops *ops) { ops->is_master = dpu_encoder_phys_wb_is_master; + ops->atomic_mode_set = dpu_encoder_phys_wb_atomic_mode_set; ops->enable = dpu_encoder_phys_wb_enable; ops->disable = dpu_encoder_phys_wb_disable; ops->wait_for_commit_done = dpu_encoder_phys_wb_wait_for_commit_done; @@ -685,7 +695,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_wb_init(struct drm_device *dev, dpu_encoder_phys_wb_init_ops(&phys_enc->ops); phys_enc->intf_mode = INTF_MODE_WB_LINE; - phys_enc->irq[INTR_IDX_WB_DONE] = phys_enc->hw_wb->caps->intr_wb_done; atomic_set(&wb_enc->wbirq_refcount, 0); diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index fab6ad4e510..c1089d789e0 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -384,6 +384,8 @@ static int msm_mdss_reset(struct device *dev) "failed to acquire mdss reset\n"); } + dev_info(dev, "toggle reset\n"); + reset_control_assert(reset); /* * Tests indicate that reset has to be held for some period of time, diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 5b15d029483..c635f288d60 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -335,6 +335,17 @@ config DRM_PANEL_LG_LG4573 Say Y here if you want to enable support for LG4573 RGB panel. To compile this driver as a module, choose M here. +config DRM_PANEL_LG_SW43408 + tristate "LG SW43408 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for LG sw43408 panel. + The panel has a 1080x2160@60Hz resolution and uses 24 bit RGB per + pixel. It provides a MIPI DSI interface to the host and has a + built-in LED backlight. + config DRM_PANEL_MAGNACHIP_D53E6EA8966 tristate "Magnachip D53E6EA8966 DSI panel" depends on OF && SPI @@ -405,6 +416,16 @@ config DRM_PANEL_NOVATEK_NT35560 mode. This supports several panels such as Sony ACX424AKM and ACX424AKP. +config DRM_PANEL_NOVATEK_NT35596S + tristate "Novatek NT35596S DSI panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for the panels built + around the Novatek NT35596S display controller, such as some + JDI panels used in a few Xiaomi Mi Mix 2S mobile phones. + config DRM_PANEL_NOVATEK_NT35950 tristate "Novatek NT35950 DSI panel" depends on OF @@ -669,6 +690,18 @@ config DRM_PANEL_SAMSUNG_SOFEF00 The panels are 2280x1080@60Hz and 2340x1080@60Hz respectively +config DRM_PANEL_SAMSUNG_S6E3FC2X01 + tristate "Samsung s6e3fc2x01 OnePlus 6T DSI cmd mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + help + Say Y or M here if you want to enable support for the Samsung AMOLED + command mode panel found in the OnePlus 6T smartphone. + + The panel is 2340x1080@60Hz + config DRM_PANEL_SEIKO_43WVF1G tristate "Seiko 43WVF1G panel" depends on OF @@ -887,6 +920,15 @@ config DRM_PANEL_VISIONOX_RM69299 Say Y here if you want to enable support for Visionox RM69299 DSI Video Mode panel. +config DRM_PANEL_VISIONOX_RM69299_SHIFT + tristate "Visionox RM69299 SHIFT6mq" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Visionox + RM69299 command mode panel variant found in the SHIFT6mq. + config DRM_PANEL_VISIONOX_VTDR6130 tristate "Visionox VTDR6130" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f156d7fa0bc..a568d761e7d 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -34,12 +34,14 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) += panel-leadtek-ltk050h3146w.o obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o +obj-$(CONFIG_DRM_PANEL_LG_SW43408) += panel-lg-sw43408.o obj-$(CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966) += panel-magnachip-d53e6ea8966.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35596S) += panel-novatek-nt35596s.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o @@ -70,6 +72,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI) += panel-samsung-s6e63m0-dsi.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01) += panel-samsung-s6e88a0-ams452ef01.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF00) += panel-samsung-sofef00.o +obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E3FC2X01) += panel-samsung-s6e3fc2x01.o obj-$(CONFIG_DRM_PANEL_SEIKO_43WVF1G) += panel-seiko-43wvf1g.o obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o @@ -89,6 +92,7 @@ obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o +obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299_SHIFT) += panel-visionox-rm69299-shift.o obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o diff --git a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c index e85d63a176d..2ad37758079 100644 --- a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c +++ b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c @@ -87,22 +87,22 @@ static int ebbg_ft8719_on(struct ebbg_ft8719 *ctx) return 0; } -static int ebbg_ft8719_off(struct ebbg_ft8719 *ctx) +static int ebbg_ft8719_disable(struct drm_panel *panel) { - struct mipi_dsi_device *dsi = ctx->dsi; - struct device *dev = &dsi->dev; + struct ebbg_ft8719 *ctx = to_ebbg_ft8719(panel); + struct device *dev = &ctx->dsi->dev; int ret; - dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; - ret = mipi_dsi_dcs_set_display_off(dsi); + ret = mipi_dsi_dcs_set_display_off(ctx->dsi); if (ret < 0) { dev_err(dev, "Failed to set display off: %d\n", ret); return ret; } usleep_range(10000, 11000); - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); + ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); if (ret < 0) { dev_err(dev, "Failed to enter sleep mode: %d\n", ret); return ret; @@ -137,13 +137,8 @@ static int ebbg_ft8719_prepare(struct drm_panel *panel) static int ebbg_ft8719_unprepare(struct drm_panel *panel) { struct ebbg_ft8719 *ctx = to_ebbg_ft8719(panel); - struct device *dev = &ctx->dsi->dev; int ret; - ret = ebbg_ft8719_off(ctx); - if (ret < 0) - dev_err(dev, "Failed to un-initialize panel: %d\n", ret); - gpiod_set_value_cansleep(ctx->reset_gpio, 1); ret = regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); @@ -188,6 +183,7 @@ static int ebbg_ft8719_get_modes(struct drm_panel *panel, static const struct drm_panel_funcs ebbg_ft8719_panel_funcs = { .prepare = ebbg_ft8719_prepare, + .disable = ebbg_ft8719_disable, .unprepare = ebbg_ft8719_unprepare, .get_modes = ebbg_ft8719_get_modes, }; @@ -233,6 +229,7 @@ static int ebbg_ft8719_probe(struct mipi_dsi_device *dsi) drm_panel_init(&ctx->panel, dev, &ebbg_ft8719_panel_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; ret = drm_panel_of_backlight(&ctx->panel); if (ret) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c new file mode 100644 index 00000000000..2413ecb6ae6 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-2024 Linaro Ltd + * Author: Sumit Semwal + * Dmitry Baryshkov + */ + +#include +#include +#include +#include +#include +#include + +#include