diff --git a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml index fa745a6f445..9d90cf72578 100644 --- a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml +++ b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml @@ -17,7 +17,9 @@ allOf: properties: compatible: - const: visionox,rm69299-1080p-display + enum: + - visionox,rm69299-1080p-display + - visionox,rm69299-shift reg: true diff --git a/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml new file mode 100644 index 00000000000..8ef9b4ec3a0 --- /dev/null +++ b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2020 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies Inc PMI8998 spmi haptics + +maintainers: + - Caleb Connolly + +description: | + Qualcomm SPMI haptics is a peripheral on some QTI PMICs. It supports linear resonant + actuators and eccentric rotating mass type haptics commonly found in mobile devices. + It supports multiple sources of wave data such as an internal buffer, direct play + (from kernel or userspace) as well as an audio output mode. + +properties: + compatible: + items: + - enum: + - qcom,pmi8998-haptics + - qcom,pmi8996-haptics + - qcom,pmi8941-haptics + - const: qcom,spmi-haptics + + reg: + maxItems: 1 + + interrupts: + items: + - description: short circuit interrupt + - description: play interrupt + + interrupt-names: + items: + - const: short + - const: play + + qcom,actuator-type: + description: | + The type of actuator attached to the hardware. + Allowed values are, + 0 - HAP_TYPE_LRA + 1 - HAP_TYPE_ERM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,wave-shape: + description: | + Selects the wave shape to use. + Allowed values are, + 0 - HAP_WAVE_SINE + 1 - HAP_WAVE_SQUARE + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,play-mode: + description: | + Selects the play mode to use. + Allowed values are, + 0 - HAP_PLAY_DIRECT + 1 - HAP_PLAY_BUFFER + 2 - HAP_PLAY_AUDIO + 3 - HAP_PLAY_PWM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3 ] + default: 2 + + qcom,wave-play-rate-us: + description: | + Wave sample durection in microseconds, 1/f where f + is the resonant frequency of the actuator. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20475 + + qcom,brake-pattern: + minItems: 4 + maxItems: 4 + description: | + The brake pattern are the strengths of the pattern + used to brake the haptics. Allowed values are, + 0 - 0V + 1 - Vmax/4 + 2 - Vmax/2 + 3 - Vmax + $ref: /schemas/types.yaml#/definitions/uint32-array + default: [0x3, 0x3, 0x2, 0x1] + +required: + - compatible + - reg + - interrupts + - qcom,wave-play-rate-us + +additionalProperties: false + +examples: + - | + #include + #include + #include + + pmi8998_lsid1: pmic@3 { + compatible = "qcom,pmi8998", "qcom,spmi-pmic"; + reg = <0x3 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmi8998_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics", "qcom,spmi-haptics"; + reg = <0xc000>; + + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x3 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,wave-shape = ; + qcom,play-mode = ; + qcom,brake-pattern = <0x3 0x3 0x2 0x1>; + + status = "disabled"; + }; + }; diff --git a/Documentation/devicetree/bindings/input/syna,rmi4.yaml b/Documentation/devicetree/bindings/input/syna,rmi4.yaml index b522c8d3ce0..04ce256300c 100644 --- a/Documentation/devicetree/bindings/input/syna,rmi4.yaml +++ b/Documentation/devicetree/bindings/input/syna,rmi4.yaml @@ -49,6 +49,16 @@ properties: description: Delay to wait after powering on the device. + syna,pdt-fallback-desc: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: + An array of pairs of function number and version. These are used + on some devices with replacement displays that use unofficial touch + controllers. These controllers do report the properties of their PDT + entries, but leave the function_number and function_version registers + blank. These values should match exactly the 5th and 4th bytes of each + PDT entry from the original display's touch controller. + vdd-supply: true vio-supply: true diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml index f2808cb4d99..745e57c0517 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml @@ -39,7 +39,9 @@ properties: - edt,edt-ft5406 - edt,edt-ft5506 - evervision,ev-ft5726 + - focaltech,ft5452 - focaltech,ft6236 + - focaltech,ft8719 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml index a8736fd5a53..c389d1955bd 100644 --- a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml @@ -23,11 +23,11 @@ properties: items: - enum: - qcom,pm6150l-flash-led + - qcom,pmi8998-flash-led - qcom,pm8150c-flash-led - qcom,pm8150l-flash-led - qcom,pm8350c-flash-led - qcom,pm8550-flash-led - - qcom,pmi8998-flash-led - const: qcom,spmi-flash-led reg: diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx519.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx519.yaml new file mode 100644 index 00000000000..4ba318581aa --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx519.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx519.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.5-Inch 16Mpixel CMOS Digital Image Sensor + +maintainers: + - Lee Jackson + +description: + The Sony IMX519 is a 1/2.5-inch CMOS active pixel digital image sensor + with an active array size of 4656H x 3496V. It is programmable through + I2C interface. The I2C address is fixed to 0x1A as per sensor data sheet. + Image data is sent through MIPI CSI-2, which is configured as either 2 or + 4 data lanes. + +properties: + compatible: + const: sony,imx519 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + vdig-supply: + description: + Digital I/O voltage supply, 1.05 volts + + vana-supply: + description: + Analog voltage supply, 2.8 volts + + vddl-supply: + description: + Digital core voltage supply, 1.8 volts + + reset-gpios: + description: + Reference to the GPIO connected to the xclr pin, if any. + Must be released (set high) after all supplies and INCK are applied. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + anyOf: + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - vana-supply + - vdig-supply + - vddl-supply + - port + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sensor@1a { + compatible = "sony,imx519"; + reg = <0x1a>; + clocks = <&imx519_clk>; + vana-supply = <&imx519_vana>; /* 2.8v */ + vdig-supply = <&imx519_vdig>; /* 1.05v */ + vddl-supply = <&imx519_vddl>; /* 1.8v */ + + port { + imx519_ep: endpoint { + remote-endpoint = <&csi1_ep>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <408000000>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml index 7758a55dd32..874ca4157fb 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml @@ -138,6 +138,12 @@ properties: description: Quirk specifying that the firmware expects the 8bit version of the host capability QMI request + + qcom,snoc-host-cap-skip-quirk: + type: boolean + description: + Quirk specifying that the firmware wants to skip the host + capability QMI request qcom,xo-cal-data: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml b/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml new file mode 100644 index 00000000000..37977344f15 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/lenovo,yoga-c630-ec.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/lenovo,yoga-c630-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lenovo Yoga C630 Embedded Controller. + +maintainers: + - Bjorn Andersson + +description: + The Qualcomm Snapdragon-based Lenovo Yoga C630 has an Embedded Controller + (EC) which handles things such as battery and USB Type-C. This binding + describes the interface, on an I2C bus, to this EC. + +properties: + compatible: + const: lenovo,yoga-c630-ec + + reg: + const: 0x70 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + interrupts: + maxItems: 1 + +patternProperties: + '^connector@[01]$': + $ref: /schemas/connector/usb-connector.yaml# + + properties: + reg: + maxItems: 1 + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - |+ + #include + i2c1 { + clock-frequency = <400000>; + + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@70 { + compatible = "lenovo,yoga-c630-ec"; + reg = <0x70>; + + interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "source"; + data-role = "host"; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "source"; + data-role = "host"; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml b/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml new file mode 100644 index 00000000000..29af7aa8379 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/qcom,fg.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-3-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/qcom,fg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm PMIC Fuel Gauge + +maintainers: + - Caleb Connolly + - Joel Selvaraj + - Yassine Oudjana + +properties: + compatible: + enum: + - qcom,pm8994-fg + - qcom,pm8998-fg + + reg: + maxItems: 1 + + monitored-battery: + description: | + phandle of battery characteristics node. + The fuel gauge uses the following battery properties: + - charge-full-design-microamp-hours + - voltage-min-design-microvolt + - voltage-max-design-microvolt + See Documentation/devicetree/bindings/power/supply/battery.yaml + +allOf: + - if: + properties: + compatible: + enum: + - qcom,pm8994-fg + + then: + properties: + interrupts: + items: + - description: State of charge change interrupt + - description: SRAM availability change interrupt + + interrupt-names: + items: + - const: soc-delta + - const: mem-avail + + - if: + properties: + compatible: + enum: + - qcom,pm8998-fg + + then: + properties: + interrupts: + items: + - description: State of charge change interrupt + + interrupt-names: + items: + - const: soc-delta + +required: + - compatible + - reg + - monitored-battery + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4070000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4400000>; + }; + + pmic { + #address-cells = <1>; + #size-cells = <0>; + + fuel-gauge@4000 { + compatible = "qcom,pmi8994-fg"; + reg = <0x4000>; + + interrupts = <0x2 0x40 0x4 IRQ_TYPE_EDGE_RISING>, + <0x2 0x44 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "soc-delta", "mem-avail"; + + monitored-battery = <&battery>; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml new file mode 100644 index 00000000000..690537738e6 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/samsung,s2dos05.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/samsung,s2dos05.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung s2dos05 regulator + +maintainers: + - Dzmitry Sankouski + +description: | + The S2DOS05 is a companion power management IC for the smart phones. + Has 4 LDO and 1 BUCK regulators, and has capability to measure + current and power. Can detect short circuit on outputs. + +properties: + compatible: + const: samsung,s2dos05 + reg: + maxItems: 1 + + regulators: + type: object + description: List of regulators and its properties + + patternProperties: + "^s2dos05-buck1|s2dos05-ldo[1-4]$": + type: object + $ref: "regulator.yaml#" + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + regulator@60 { + compatible = "samsung,s2dos05"; + reg = <0x60>; + pinctrl-names = "default"; + pinctrl-0 = <&s2dos05_irq>; + s2dos05,s2dos05_int = <&tlmm 0x31 0x0>; + + regulators { + s2dos05_ldo1: s2dos05-ldo1 { + regulator-name = "s2dos05-ldo1"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2000000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_ldo2: s2dos05-ldo2 { + regulator-name = "s2dos05-ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo3: s2dos05-ldo3 { + regulator-name = "s2dos05-ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo4: s2dos05-ldo4 { + regulator-name = "s2dos05-ldo4"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3775000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_buck1: s2dos05-buck1 { + regulator-name = "s2dos05-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <2100000>; + regulator-active-discharge = <0x1>; + }; + }; + }; diff --git a/Documentation/input/event-codes.rst b/Documentation/input/event-codes.rst index b4557462edd..d43336e64d6 100644 --- a/Documentation/input/event-codes.rst +++ b/Documentation/input/event-codes.rst @@ -241,6 +241,12 @@ A few EV_ABS codes have special meanings: emitted only when the selected profile changes, indicating the newly selected profile value. +* ABS_SND_PROFILE: + + - Used to describe the state of a multi-value sound profile switch. + An event is emitted only when the selected profile changes, + indicating the newly selected profile value. + * ABS_MT_: - Used to describe multitouch input events. Please see diff --git a/MAINTAINERS b/MAINTAINERS index a7c4cf8201e..5426ae32c1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6811,6 +6811,11 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/samsung,s6d7aa0.yaml F: drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c +DRM DRIVER FOR SAMSUNG S6E3FC2X01 PANELS +M: Nia Espera +S: Maintained +F: drivers/gpu/drm/panel/panel-samsung-s6e3fc2x01.c + DRM DRIVER FOR SITRONIX ST7586 PANELS M: David Lechner S: Maintained @@ -20170,6 +20175,15 @@ T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml F: drivers/media/i2c/imx415.c +SONY IMX519 SENSOR DRIVER +M: Arducam Kernel Maintenance +M: Lee Jackson +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/sony,imx519.yaml +F: drivers/media/i2c/imx519.c + SONY MEMORYSTICK SUBSYSTEM M: Maxim Levitsky M: Alex Dubov diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d6cb840b705..28f3a66dc2f 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb +dtb-$(CONFIG_ARCH_QCOM) += sc7180-tcl-b220g.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb diff --git a/arch/arm64/boot/dts/qcom/pmi8998.dtsi b/arch/arm64/boot/dts/qcom/pmi8998.dtsi index cd3f0790fd4..2ceee5ff81b 100644 --- a/arch/arm64/boot/dts/qcom/pmi8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8998.dtsi @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include #include @@ -44,6 +45,17 @@ pmi8998_rradc: adc@4500 { reg = <0x4500>; #io-channel-cells = <1>; }; + + pmi8998_fg: fuel-gauge@4000 { + compatible = "qcom,pmi8998-fg"; + reg = <0x4000>; + + interrupts = <0x2 0x40 0x3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "soc-delta"; + + status = "disabled"; + }; + }; pmi8998_lsid1: pmic@3 { @@ -94,5 +106,20 @@ pmi8998_wled: leds@d800 { status = "disabled"; }; + + pmi8998_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics", "qcom,spmi-haptics"; + reg = <0xc000>; + + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x3 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,wave-shape = ; + qcom,play-mode = ; + qcom,brake-pattern = <0x3 0x3 0x2 0x1>; + + status = "disabled"; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi index d46e591e72b..2b952a5b752 100644 --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi @@ -5,12 +5,14 @@ * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain. */ +#include #include #include #include #include #include #include +#include #include / { @@ -150,6 +152,7 @@ scm: scm { clocks = <&rpmcc RPM_SMD_CE1_CLK>; clock-names = "core"; #reset-cells = <1>; + interconnects = <&system_noc MASTER_CRYPTO_CORE0 0 &bimc SLAVE_EBI1 0>; }; }; @@ -170,32 +173,35 @@ psci { CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; + //power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP>; }; CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; + //power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP>; }; CPU_PD2: power-domain-cpu2 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; + //power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP>; }; CPU_PD3: power-domain-cpu3 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; + //power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP>; }; +#if 0 CLUSTER_PD: power-domain-cpu-cluster { #power-domain-cells = <0>; + power-domains = <&mpm>; domain-idle-states = <&CLUSTER_SLEEP>; }; +#endif }; rpm: remoteproc { @@ -261,6 +267,24 @@ rpmpd_opp_turbo_plus: opp8 { }; }; }; + + mpm: interrupt-controller { + compatible = "qcom,mpm"; + qcom,rpm-msg-ram = <&apss_mpm>; + interrupts = ; + mboxes = <&apcs_glb 1>; + interrupt-controller; + #interrupt-cells = <2>; + #power-domain-cells = <0>; + interrupt-parent = <&intc>; + qcom,mpm-pin-count = <96>; + qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */ + <5 296>, /* Soundwire master_irq */ + <12 422>, /* DWC3 ss_phy_irq */ + <24 79>, /* Soundwire wake_irq */ + <86 183>, /* MPM wake, SPMI */ + <90 260>; /* DWC3 dp/dm_hs_phy_irq */ + }; }; reserved_memory: reserved-memory { @@ -424,6 +448,7 @@ tlmm: pinctrl@500000 { interrupts = ; gpio-controller; gpio-ranges = <&tlmm 0 0 127>; + wakeup-parent = <&mpm>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -668,6 +693,33 @@ usb_qmpphy: phy@1615000 { status = "disabled"; }; + system_noc: interconnect@1880000 { + compatible = "qcom,qcm2290-snoc"; + reg = <0x0 0x01880000 0x0 0x60200>; + #interconnect-cells = <2>; + + qup_virt: interconnect-qup { + compatible = "qcom,qcm2290-qup-virt"; + #interconnect-cells = <2>; + }; + + mmnrt_virt: interconnect-mmnrt { + compatible = "qcom,qcm2290-mmnrt-virt"; + #interconnect-cells = <2>; + }; + + mmrt_virt: interconnect-mmrt { + compatible = "qcom,qcm2290-mmrt-virt"; + #interconnect-cells = <2>; + }; + }; + + config_noc: interconnect@1900000 { + compatible = "qcom,qcm2290-cnoc"; + reg = <0x0 0x01900000 0x0 0x8200>; + #interconnect-cells = <2>; + }; + qfprom@1b44000 { compatible = "qcom,qcm2290-qfprom", "qcom,qfprom"; reg = <0x0 0x01b44000 0x0 0x3000>; @@ -680,6 +732,60 @@ qusb2_hstx_trim: hstx-trim@25b { }; }; + pmu@1b8e300 { + compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon"; + reg = <0 0x01b8e300 0 0x600>; + interrupts = ; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + interconnects = <&bimc MASTER_APPSS_PROC 1 + &bimc SLAVE_EBI1 1>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <1525000>; + }; + + opp-1 { + opp-peak-kBps = <2288000>; + }; + + opp-2 { + opp-peak-kBps = <3440000>; + }; + + opp-3 { + opp-peak-kBps = <4173000>; + }; + + opp-4 { + opp-peak-kBps = <5195000>; + }; + + opp-5 { + opp-peak-kBps = <5859000>; + }; + + opp-6 { + opp-peak-kBps = <7759000>; + }; + + opp-7 { + opp-peak-kBps = <10322000>; + }; + + opp-8 { + opp-peak-kBps = <11863000>; + }; + + opp-9 { + opp-peak-kBps = <13763000>; + }; + }; + }; + spmi_bus: spmi@1c40000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0 0x01c40000 0x0 0x1100>, @@ -692,7 +798,7 @@ spmi_bus: spmi@1c40000 { "obsrvr", "intr", "cnfg"; - interrupts = ; + interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "periph_irq"; qcom,ee = <0>; qcom,channel = <0>; @@ -707,8 +813,8 @@ tsens0: thermal-sensor@4411000 { reg = <0x0 0x04411000 0x0 0x1ff>, <0x0 0x04410000 0x0 0x8>; #qcom,sensors = <10>; - interrupts = , - ; + interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "uplow", "critical"; #thermal-sensor-cells = <1>; }; @@ -720,9 +826,22 @@ rng: rng@4453000 { clock-names = "core"; }; + bimc: interconnect@4480000 { + compatible = "qcom,qcm2290-bimc"; + reg = <0x0 0x04480000 0x0 0x80000>; + #interconnect-cells = <2>; + }; + rpm_msg_ram: sram@45f0000 { - compatible = "qcom,rpm-msg-ram"; + compatible = "qcom,rpm-msg-ram", "mmio-sram"; reg = <0x0 0x045f0000 0x0 0x7000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x045f0000 0x7000>; + + apss_mpm: sram@1b8 { + reg = <0x1b8 0x48>; + }; }; sram@4690000 { @@ -755,13 +874,43 @@ sdhc_1: mmc@4744000 { resets = <&gcc GCC_SDCC1_BCR>; power-domains = <&rpmpd QCM2290_VDDCX>; + operating-points-v2 = <&sdhc1_opp_table>; iommus = <&apps_smmu 0xc0 0x0>; + interconnects = <&system_noc MASTER_SDCC_1 0 &bimc SLAVE_EBI1 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_1 0>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; qcom,dll-config = <0x000f642c>; qcom,ddr-config = <0x80040868>; bus-width = <8>; status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <250000 133320>; + opp-avg-kBps = <102400 65000>; + }; + + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <204800 200000>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_svs_plus>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <204800 200000>; + }; + }; }; sdhc_2: mmc@4784000 { @@ -785,6 +934,10 @@ sdhc_2: mmc@4784000 { power-domains = <&rpmpd QCM2290_VDDCX>; operating-points-v2 = <&sdhc2_opp_table>; iommus = <&apps_smmu 0xa0 0x0>; + interconnects = <&system_noc MASTER_SDCC_2 0 &bimc SLAVE_EBI1 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; @@ -798,11 +951,15 @@ sdhc2_opp_table: opp-table { opp-100000000 { opp-hz = /bits/ 64 <100000000>; required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <250000 133320>; + opp-avg-kBps = <261438 150000>; }; opp-202000000 { opp-hz = /bits/ 64 <202000000>; required-opps = <&rpmpd_opp_svs_plus>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <261438 300000>; }; }; }; @@ -850,6 +1007,12 @@ i2c0: i2c@4a80000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, <&gpi_dma0 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -866,6 +1029,10 @@ spi0: spi@4a80000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, <&gpi_dma0 1 0 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -879,6 +1046,10 @@ uart0: serial@4a80000 { clock-names = "se"; pinctrl-0 = <&qup_uart0_default>; pinctrl-names = "default"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; status = "disabled"; }; @@ -893,6 +1064,12 @@ i2c1: i2c@4a84000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, <&gpi_dma0 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -909,6 +1086,10 @@ spi1: spi@4a84000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, <&gpi_dma0 1 1 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -925,6 +1106,12 @@ i2c2: i2c@4a88000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, <&gpi_dma0 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -941,6 +1128,10 @@ spi2: spi@4a88000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, <&gpi_dma0 1 2 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -957,6 +1148,12 @@ i2c3: i2c@4a8c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, <&gpi_dma0 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -973,6 +1170,10 @@ spi3: spi@4a8c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, <&gpi_dma0 1 3 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -989,6 +1190,12 @@ i2c4: i2c@4a90000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, <&gpi_dma0 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1005,6 +1212,10 @@ spi4: spi@4a90000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, <&gpi_dma0 1 4 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1018,6 +1229,10 @@ uart4: serial@4a90000 { clock-names = "se"; pinctrl-0 = <&qup_uart4_default>; pinctrl-names = "default"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; status = "disabled"; }; @@ -1032,6 +1247,12 @@ i2c5: i2c@4a94000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, <&gpi_dma0 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI1 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1048,6 +1269,10 @@ spi5: spi@4a94000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, <&gpi_dma0 1 5 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc MASTER_APPSS_PROC 0>; + interconnect-names = "qup-core", + "qup-config"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1057,9 +1282,10 @@ spi5: spi@4a94000 { usb: usb@4ef8800 { compatible = "qcom,qcm2290-dwc3", "qcom,dwc3"; reg = <0x0 0x04ef8800 0x0 0x400>; - interrupts = , - ; - interrupt-names = "hs_phy_irq", "ss_phy_irq"; + interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", + "ss_phy_irq"; clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, @@ -1080,6 +1306,11 @@ usb: usb@4ef8800 { resets = <&gcc GCC_USB30_PRIM_BCR>; power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + /* TODO: USB<->IPA path */ + interconnects = <&system_noc MASTER_USB3_0 0 &bimc SLAVE_EBI1 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>; + interconnect-names = "usb-ddr", + "apps-usb"; wakeup-source; #address-cells = <2>; @@ -1105,6 +1336,223 @@ usb_dwc3: usb@4e00000 { }; }; + mdss: display-subsystem@5e00000 { + compatible = "qcom,qcm2290-mdss"; + reg = <0x0 0x05e00000 0x0 0x1000>; + reg-names = "mdss"; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", + "bus", + "core"; + + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; + + power-domains = <&dispcc MDSS_GDSC>; + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; + interconnects = <&mmrt_virt MASTER_MDP0 0 &bimc SLAVE_EBI1 0>, + <&bimc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; + interconnect-names = "mdp0-mem", + "cpu-cfg"; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + status = "disabled"; + + mdp: display-controller@5e01000 { + compatible = "qcom,qcm2290-dpu"; + reg = <0x0 0x05e01000 0x0 0x8f000>, + <0x0 0x05eb0000 0x0 0x2008>; + reg-names = "mdp", + "vbif"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", + "iface", + "core", + "lut", + "vsync"; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmpd QCM2290_VDDCX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-256000000 { + opp-hz = /bits/ 64 <256000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + mdss_dsi0: dsi@5e94000 { + compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x0 0x05e94000 0x0 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmpd QCM2290_VDDCX>; + phys = <&mdss_dsi0_phy>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + dsi_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-164000000 { + opp-hz = /bits/ 64 <164000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmpd_opp_svs>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi0_out: endpoint { + }; + }; + }; + }; + + mdss_dsi0_phy: phy@5e94400 { + compatible = "qcom,dsi-phy-14nm-2290"; + reg = <0x0 0x05e94400 0x0 0x100>, + <0x0 0x05e94500 0x0 0x300>, + <0x0 0x05e94800 0x0 0x188>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", + "ref"; + + power-domains = <&rpmpd QCM2290_VDDMX>; + required-opps = <&rpmpd_opp_nom>; + + #clock-cells = <1>; + #phy-cells = <0>; + + status = "disabled"; + }; + }; + + dispcc: clock-controller@5f00000 { + compatible = "qcom,qcm2290-dispcc"; + reg = <0x0 0x05f00000 0x0 0x20000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&rpmcc RPM_SMD_XO_A_CLK_SRC>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, + <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; + clock-names = "bi_tcxo", + "bi_tcxo_ao", + "gcc_disp_gpll0_clk_src", + "gcc_disp_gpll0_div_clk_src", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk"; + #power-domain-cells = <1>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + remoteproc_mpss: remoteproc@6080000 { compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas"; reg = <0x0 0x06080000 0x0 0x100>; diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts index fd38a6278f2..6352b4976b9 100644 --- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts @@ -23,6 +23,14 @@ chosen { stdout-path = "serial0:115200n8"; }; + clocks { + clk40M: can-clk { + compatible = "fixed-clock"; + clock-frequency = <40000000>; + #clock-cells = <0>; + }; + }; + gpio-keys { compatible = "gpio-keys"; label = "gpio-keys"; @@ -72,6 +80,49 @@ led-wlan { }; }; + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-bt { + label = "blue:bt"; + function = LED_FUNCTION_BLUETOOTH; + color = ; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + + led-user0 { + label = "green:user0"; + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + + led-wlan { + label = "yellow:wlan"; + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + }; + vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 { compatible = "regulator-fixed"; regulator-name = "VREG_HDMI_OUT_1P2"; @@ -158,6 +209,68 @@ vph_pwr: regulator-vph-pwr { }; }; +&gpi_dma0 { + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + + lt9611_codec: hdmi-bridge@2b { + compatible = "lontium,lt9611uxc"; + reg = <0x2b>; + interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 41 GPIO_ACTIVE_HIGH>; + + vdd-supply = <&vreg_hdmi_out_1p2>; + vcc-supply = <<9611_3v3>; + + pinctrl-0 = <<9611_irq_pin <9611_rst_pin>; + pinctrl-names = "default"; + #sound-dai-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&pm2250_l5>; + status = "okay"; +}; + +&mdss_dsi0_out { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; +}; + &pm2250_resin { linux,code = ; status = "okay"; @@ -376,7 +489,34 @@ &sdhc_2 { status = "okay"; }; +&spi5 { + status = "okay"; + + can@0 { + compatible = "microchip,mcp2518fd"; + reg = <0>; + interrupts-extended = <&tlmm 39 IRQ_TYPE_LEVEL_LOW>; + clocks = <&clk40M>; + spi-max-frequency = <10000000>; + vdd-supply = <&vdc_5v>; + xceiver-supply = <&vdc_5v>; + }; +}; + &tlmm { + lt9611_rst_pin: lt9611-rst-state { + pins = "gpio41"; + function = "gpio"; + input-disable; + output-high; + }; + + lt9611_irq_pin: lt9611-irq-state { + pins = "gpio46"; + function = "gpio"; + bias-disable; + }; + sd_det_in_on: sd-det-in-on-state { pins = "gpio88"; function = "gpio"; @@ -409,6 +549,10 @@ &usb { status = "okay"; }; +&usb_dwc3 { + dr_mode = "host"; +}; + &usb_qmpphy { vdda-phy-supply = <&pm2250_l12>; vdda-pll-supply = <&pm2250_l13>; @@ -431,6 +575,7 @@ &wifi { vdd-1.8-xo-supply = <&pm2250_l13>; vdd-1.3-rfa-supply = <&pm2250_l10>; vdd-3.3-ch0-supply = <&pm2250_l22>; + qcom,ath10k-calibration-variant = "Thundercomm_RB1"; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index 9738c0dacd5..8b3e8200ea5 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -280,6 +280,12 @@ &remoteproc_cdsp { status = "okay"; }; +&remoteproc_mpss { + firmware-name = "qcom/qrb4210/modem.mbn"; + + status = "okay"; +}; + &rpm_requests { regulators { compatible = "qcom,rpm-pm6125-regulators"; @@ -346,8 +352,8 @@ vreg_l7a_1p256: l7 { }; vreg_l8a_0p664: l8 { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <728000>; + regulator-min-microvolt = <640000>; + regulator-max-microvolt = <640000>; }; vreg_l9a_1p8: l9 { @@ -424,8 +430,8 @@ vreg_l22a_2p96: l22 { }; vreg_l23a_3p3: l23 { - regulator-min-microvolt = <3200000>; - regulator-max-microvolt = <3400000>; + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3312000>; }; vreg_l24a_2p96: l24 { @@ -518,6 +524,7 @@ &usb { &usb_dwc3 { maximum-speed = "super-speed"; + dr_mode = "host"; }; &usb_hsphy { @@ -535,6 +542,15 @@ &usb_qmpphy { status = "okay"; }; +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; + vdd-1.8-xo-supply = <&vreg_l16a_1p3>; + vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l23a_3p3>; + qcom,ath10k-calibration-variant = "Thundercomm_RB2"; + status = "okay"; +}; + &xo_board { clock-frequency = <19200000>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180-tcl-b220g.dts b/arch/arm64/boot/dts/qcom/sc7180-tcl-b220g.dts new file mode 100644 index 00000000000..a22062a9fc8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-tcl-b220g.dts @@ -0,0 +1,639 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/dts-v1/; + +#include +#include + +#include "sc7180.dtsi" + +#include "pm6150.dtsi" +#include "pm6150l.dtsi" + +/delete-node/ &tz_mem; +/delete-node/ &ipa_fw_mem; + +/ { + model = "TCL Book 14 Go"; + compatible = "tcl,b220g", "qcom,sc7180"; + chassis-type = "laptop"; + + aliases { + bluetooth0 = &bluetooth; + hsuart0 = &uart3; + serial0 = &uart8; + wifi0 = &wifi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + zap_mem: zap-shader@80840000 { + reg = <0x0 0x80840000 0 0x2000>; + no-map; + }; + + venus_mem: venus@85b00000 { + reg = <0x0 0x85b00000 0 0x500000>; + no-map; + }; + + mpss_mem: mpss@86000000 { + reg = <0x0 0x86000000 0x0 0x2000000>; + no-map; + }; + + adsp_mem: adsp@8e400000 { + reg = <0x0 0x8e400000 0x0 0x2800000>; + no-map; + }; + + wlan_mem: wlan@93900000 { + reg = <0x0 0x93900000 0x0 0x200000>; + no-map; + }; + // zap_mem: zap-shader@80840000 { + // reg = <0x0 0x80840000 0 0x2000>; + // no-map; + // }; + + // venus_mem: venus@85b00000 { + // reg = <0x0 0x85b00000 0 0x500000>; + // no-map; + // }; + + // mpss_mem: mpss@86000000 { + // reg = <0x0 0x86000000 0x0 0x2000000>; + // no-map; + // }; + + // adsp_mem: adsp@8be00000 { + // reg = <0x0 0x8be00000 0x0 0x1a00000>; + // no-map; + // }; + + // cdsp_mem: cdsp@98900000 { + // reg = <0x0 0x98900000 0x0 0x800000>; + // no-map; + // }; + + // slpi_mem: slpi@93700000 { + // reg = <0x0 0x93700000 0x0 0x1400000>; + // no-map; + // }; + + // wlan_mem: wlan@93900000 { + // reg = <0x0 0x93900000 0x0 0x200000>; + // no-map; + // }; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + + /* embedded-controller@76 */ +}; + +&i2c4 { + clock-frequency = <400000>; + status = "okay"; + + /* + * NOTE: DSDT defines two possible touchpads, other one is + * + * reg = <0x15>; + * hid-descr-addr = <0x1>; + */ + + touchpad@2c { + compatible = "hid-over-i2c"; + reg = <0x2c>; + hid-descr-addr = <0x20>; + + //vdd-supply = <®_tp_3p3>; + + interrupts-extended = <&tlmm 94 IRQ_TYPE_LEVEL_LOW>; + + // pinctrl-0 = <&hid_touchpad_default>; + // pinctrl-names = "default"; + + wakeup-source; + }; + + keyboard@3a { + compatible = "hid-over-i2c"; + reg = <0x3a>; + hid-descr-addr = <0x1>; + + interrupts-extended = <&tlmm 33 IRQ_TYPE_LEVEL_LOW>; + + // pinctrl-0 = <&hid_keyboard_default>; + // pinctrl-names = "default"; + + wakeup-source; + }; +}; + +&i2c9 { + clock-frequency = <400000>; + status = "okay"; + +}; + +&i2c10 { + clock-frequency = <400000>; + status = "okay"; + +}; + +&gpu { + status = "okay"; + + zap-shader { + memory-region = <&zap_mem>; + firmware-name = "qcom/sc7180/acer/aspire1/qcdxkmsuc7180.mbn"; + }; +}; + +// &mdss { +// status = "okay"; +// }; + +// &mdss_dsi0 { +// vdda-supply = <&vreg_l3c_1p2>; +// status = "okay"; +// }; + +// &mdss_dsi0_out { +// remote-endpoint = <&sn65dsi86_in>; +// data-lanes = <0 1 2 3>; +// }; + +// &mdss_dsi0_phy { +// vdds-supply = <&vreg_l4a_0p8>; +// status = "okay"; +// }; + +&pm6150_adc { + channel@4e { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "thermistor"; + }; + + channel@4f { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "charger_thermistor"; + }; +}; + +&pm6150_adc_tm { + status = "okay"; + + charger-thermistor@0 { + reg = <0>; + io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + thermistor@1 { + reg = <1>; + io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm6150_pon { + status = "disabled"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sc7180/acer/aspire1/qcmpss7180_nm.mbn"; + status = "okay"; +}; + +&sdhc_1 { + pinctrl-0 = <&sdc1_default>; + pinctrl-1 = <&sdc1_sleep>; + pinctrl-names = "default", "sleep"; + vmmc-supply = <&vreg_l19a_2p9>; + vqmmc-supply = <&vreg_l12a_1p8>; + + status = "okay"; +}; + +&uart3 { + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 41 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart3_sleep>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn3991-bt"; + vddio-supply = <&vreg_l10a_1p8>; + vddxo-supply = <&vreg_l1c_1p8>; + vddrf-supply = <&vreg_l2c_1p3>; + vddch0-supply = <&vreg_l10c_3p3>; + max-speed = <3200000>; + }; +}; + +&uart8 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + + // vcc-supply = <&vreg_l20a_2p95>; + // vcc-max-microamp = <600000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vdd_ufs1_core>; + vdda-pll-supply = <&vdd_ufs1_1p2>; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "host"; + #address-cells = <1>; + #size-cells = <0>; + + usb_hub_2_x: hub@1 { + compatible = "usbbda,5411"; + reg = <1>; + peer-hub = <&usb_hub_3_x>; + }; + + usb_hub_3_x: hub@2 { + compatible = "usbbda,411"; + reg = <2>; + peer-hub = <&usb_hub_2_x>; + }; +}; + +&usb_1_hsphy { + vdd-supply = <&vreg_l4a_0p8>; + vdda-pll-supply = <&vreg_l11a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l17a_3p0>; + qcom,imp-res-offset-value = <8>; + qcom,preemphasis-level = ; + qcom,preemphasis-width = ; + qcom,bias-ctrl-value = <0x22>; + qcom,charge-ctrl-value = <3>; + qcom,hsdisc-trim-value = <0>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l3c_1p2>; + vdda-pll-supply = <&vreg_l4a_0p8>; + + status = "okay"; +}; + +&venus { + firmware-name = "qcom/sc7180/acer/aspire1/qcvss7180.mbn"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>; + vdd-1.8-xo-supply = <&vreg_l1c_1p8>; + vdd-1.3-rfa-supply = <&vreg_l2c_1p3>; + vdd-3.3-ch0-supply = <&vreg_l10c_3p3>; + vdd-3.3-ch1-supply = <&vreg_l11c_3p3>; + + status = "okay"; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm6150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a_1p1: smps1 { + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vdd_ufs1_core: + vreg_l4a_0p8: ldo4 { + regulator-min-microvolt = <824000>; + regulator-max-microvolt = <928000>; + regulator-initial-mode = ; + }; + + vreg_l9a_0p6: ldo9 { + regulator-min-microvolt = <488000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-always-on; + regulator-boot-on; + }; + + vreg_l11a_1p8: ldo11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_1p8: ldo13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l17a_3p0: ldo17 { + regulator-min-microvolt = <2920000>; + regulator-max-microvolt = <3232000>; + regulator-initial-mode = ; + }; + + vreg_l18a_2p8: ldo18 { + regulator-min-microvolt = <2496000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l19a_2p9: ldo19 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt = <1120000>; + regulator-max-microvolt = <1408000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1616000>; + regulator-max-microvolt = <1984000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt = <1168000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vdd_ufs1_1p2: + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt = <1144000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p9: ldo6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p9: ldo9 { + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <2952000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + }; +}; + +// &qup_i2c2_default { +// drive-strength = <2>; + +// /* Has external pullup */ +// bias-disable; +// }; + +// &qup_i2c4_default { +// drive-strength = <2>; + +// /* Has external pullup */ +// bias-disable; +// }; + +// &qup_i2c9_default { +// drive-strength = <2>; + +// /* Has external pullup */ +// bias-disable; +// }; + +// &qup_i2c10_default { +// drive-strength = <2>; + +// /* Has external pullup */ +// bias-disable; +// }; + +&tlmm { + /* + * The TZ seem to protect those because some boards can have + * fingerprint sensor connected to this range. Not connected + * on this board + */ + gpio-reserved-ranges = <58 5>; + + qup_uart3_sleep: qup-uart3-sleep-state { + cts-pins { + /* + * Configure a pull-down on CTS to match the pull of + * the Bluetooth module. + */ + pins = "gpio38"; + function = "gpio"; + bias-pull-down; + }; + + rts-pins { + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + pins = "gpio39"; + function = "gpio"; + bias-pull-down; + }; + + tx-pins { + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + pins = "gpio40"; + function = "gpio"; + bias-pull-up; + }; + + rx-pins { + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + pins = "gpio41"; + function = "gpio"; + bias-pull-up; + }; + }; + + sdc1_default: sdc1-default-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <16>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <16>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_sleep: sdc1-sleep-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <2>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index c0365832c31..68ffd29f1a2 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1532,6 +1532,83 @@ mmss_noc: interconnect@1740000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + ufs_mem_hc: ufshc@1d84000 { + compatible = "qcom,sdm845-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x2500>, + <0 0x01d90000 0 0x8000>; + reg-names = "std", "ice"; + interrupts = ; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + power-domains = <&gcc UFS_PHY_GDSC>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + iommus = <&apps_smmu 0x100 0xf>; + + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "ice_core_clk"; + clocks = + <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + freq-table-hz = + <50000000 200000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <75000000 300000000>; + + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + + status = "disabled"; + }; + + ufs_mem_phy: phy@1d87000 { + compatible = "qcom,sdm845-qmp-ufs-phy"; + reg = <0 0x01d87000 0 0x18c>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clock-names = "ref", + "ref_aux"; + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; + + ufs_mem_phy_lanes: phy@1d87400 { + reg = <0 0x01d87400 0 0x108>, + <0 0x01d87600 0 0x1e0>, + <0 0x01d87c00 0 0x1dc>, + <0 0x01d87800 0 0x108>, + <0 0x01d87a00 0 0x1e0>; + #phy-cells = <0>; + }; + }; + ipa: ipa@1e40000 { compatible = "qcom,sc7180-ipa"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 7e7bf3fb3be..d4f6284694a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -194,6 +194,7 @@ pcie0_3p3v_dual: vldo-3v3-regulator { regulator-max-microvolt = <3300000>; gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; + regulator-always-on; enable-active-high; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi index 99dafc6716e..57ed447409d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi @@ -93,12 +93,6 @@ spss_mem: memory@99000000 { no-map; }; - /* Framebuffer region */ - memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x2400000>; - no-map; - }; - /* rmtfs lower guard */ memory@f0800000 { reg = <0 0xf0800000 0 0x1000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi index b523b5fff70..2cd4567bc94 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi @@ -8,9 +8,11 @@ /dts-v1/; #include +#include #include #include #include +#include #include "sdm845.dtsi" #include "sdm845-wcd9340.dtsi" @@ -20,6 +22,41 @@ /delete-node/ &rmtfs_mem; / { + alert-slider { + compatible = "gpio-keys"; + label = "Alert slider"; + + pinctrl-0 = <&alert_slider_default>; + pinctrl-names = "default"; + + switch-top { + label = "Silent"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + + switch-middle { + label = "Vibrate"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + + switch-bottom { + label = "Ring"; + linux,input-type = ; + linux,code = ; + linux,input-value = ; + gpios = <&tlmm 24 GPIO_ACTIVE_LOW>; + linux,can-disable; + }; + }; + aliases { serial0 = &uart9; serial1 = &uart6; @@ -252,7 +289,6 @@ vreg_l14a_1p88: ldo14 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = ; - regulator-always-on; }; vreg_l17a_1p3: ldo17 { @@ -388,6 +424,8 @@ synaptics-rmi4-i2c@20 { syna,reset-delay-ms = <200>; syna,startup-delay-ms = <200>; + syna,pdt-fallback-desc = [34 41 01 01 12 01]; + rmi4-f01@1 { reg = <0x01>; syna,nosleep-mode = <1>; @@ -396,7 +434,7 @@ rmi4-f01@1 { rmi4_f12: rmi4-f12@12 { reg = <0x12>; touchscreen-x-mm = <68>; - touchscreen-y-mm = <144>; + syna,clip-x-high = <1079>; syna,sensor-type = <1>; syna,rezero-wait-ms = <200>; }; @@ -484,6 +522,46 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_flash { + status = "okay"; + + led-0 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <1>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; + + led-1 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <2>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; +}; + +&pmi8998_haptics { + status = "okay"; + + qcom,wave-play-rate-us = <4255>; +}; + +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; +}; + &q6afedai { qi2s@22 { reg = <22>; @@ -603,6 +681,13 @@ cpu { }; }; + voicemmode1-dai-link { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; + speaker_playback_dai: speaker-dai-link { link-name = "Speaker Playback"; cpu { @@ -780,8 +865,9 @@ hall_sensor_default: hall-sensor-default-state { bias-disable; }; - tri_state_key_default: tri-state-key-default-state { - pins = "gpio40", "gpio42", "gpio26"; + + alert_slider_default: alert-slider-default-state { + pins = "gpio126", "gpio52", "gpio24"; function = "gpio"; drive-strength = <2>; bias-disable; @@ -849,4 +935,5 @@ &wifi { vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; + qcom,ath10k-calibration-variant = "oneplus_sdm845"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts index 4005e04d998..476f0810fbc 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts @@ -6,6 +6,7 @@ */ #include "sdm845-oneplus-common.dtsi" +#include / { model = "OnePlus 6"; @@ -55,6 +56,33 @@ &pmi8998_charger { monitored-battery = <&battery>; }; +&pmi8998_lpg { + status = "okay"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@3 { + reg = <3>; + color = ; + }; + + led@4 { + reg = <4>; + color = ; + }; + + led@5 { + reg = <5>; + color = ; + }; + }; +}; + &sound { model = "OnePlus 6"; audio-routing = "RX_BIAS", "MCLK", @@ -70,6 +98,11 @@ codec { }; }; +&rmi4_f12 { + touchscreen-y-mm = <144>; + syna,clip-y-high = <2279>; +}; + &wcd9340 { qcom,micbias1-microvolt = <1800000>; qcom,micbias2-microvolt = <2700000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts index 9471ada0d6a..5a81287fa6d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts @@ -30,7 +30,16 @@ &display_panel { }; &i2c4 { - /* nxp,tfa9894 @ 0x34 */ + status = "okay"; + clock-frequency = <400000>; + + tfa9894_codec: tfa9894@34 { + #sound-dai-cells = <1>; + compatible = "nxp,tfa9894"; + reg = <0x34>; + reset-gpio = <&tlmm 69 0>; + }; + }; &bq27441_fg { @@ -51,15 +60,15 @@ &pmi8998_charger { monitored-battery = <&battery>; }; -/* - * The TFA9894 codec is currently unsupported. - * We need to delete the node to allow the soundcard - * to probe for headphones/earpiece. - */ -/delete-node/ &speaker_playback_dai; +&speaker_playback_dai { + codec { + sound-dai = <&tfa9894_codec 0>; + }; +}; &rmi4_f12 { touchscreen-y-mm = <148>; + syna,clip-y-high = <2339>; }; &wcd9340 { diff --git a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts index d37a433130b..a3b0aff86c8 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts @@ -11,11 +11,17 @@ #include #include "sdm845.dtsi" +/delete-node/ &rmtfs_mem; + / { chassis-type = "handset"; model = "Samsung Galaxy S9 SM-G9600"; compatible = "samsung,starqltechn", "qcom,sdm845"; + aliases { + serial0 = &uart9; + }; + chosen { #address-cells = <2>; #size-cells = <2>; @@ -27,6 +33,9 @@ framebuffer: framebuffer@9d400000 { height = <2960>; stride = <(1440 * 4)>; format = "a8r8g8b8"; + vci-supply = <&s2dos05_ldo4>; + vddr-supply = <&s2dos05_buck1>; + vdd3-supply = <&s2dos05_ldo1>; }; }; @@ -55,11 +64,6 @@ vreg_s4a_1p8: pm8998-smps4 { }; reserved-memory { - memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x02400000>; - no-map; - }; - memory@a1300000 { compatible = "ramoops"; reg = <0x0 0xa1300000 0x0 0x100000>; @@ -68,6 +72,93 @@ memory@a1300000 { ftrace-size = <0x40000>; pmsg-size = <0x40000>; }; + + /* The rmtfs_mem needs to be guarded due to "XPU limitations" + * it is otherwise possible for an allocation adjacent to the + * rmtfs_mem region to trigger an XPU violation, causing a crash. + */ + rmtfs_lower_guard: memory@fde00000 { + no-map; + reg = <0 0xfde00000 0 0x1000>; + }; + + rmtfs_mem: rmtfs-mem@fde01000 { + compatible = "qcom,rmtfs-mem"; + reg = <0 0xfde01000 0 0x200000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + + rmtfs_upper_guard: rmtfs-upper-guard@fe001000 { + no-map; + reg = <0 0xfe001000 0 0x1000>; + }; + + /* + * It seems like reserving the old rmtfs_mem region is also needed to prevent + * random crashes which are most likely modem related, more testing needed. + */ + removed_region: removed-region@88f00000 { + no-map; + reg = <0 0x88f00000 0 0x1c00000>; + }; + }; + + i2c@21 { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 127 0x0>; + scl-gpios = <&tlmm 128 0x0>; + i2c-gpio,delay-us = <0x2>; + #address-cells = <0x1>; + #size-cells = <0x0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c21_sda_state &i2c21_scl_state>; + + regulator@60 { + compatible = "samsung,s2dos05"; + reg = <0x60>; + + regulators { + s2dos05_ldo1: s2dos05-ldo1 { + regulator-name = "s2dos05-ldo1"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2000000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_ldo2: s2dos05-ldo2 { + regulator-name = "s2dos05-ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo3: s2dos05-ldo3 { + regulator-name = "s2dos05-ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-active-discharge = <0x1>; + regulator-boot-on; + }; + + s2dos05_ldo4: s2dos05-ldo4 { + regulator-name = "s2dos05-ldo4"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3775000>; + regulator-active-discharge = <0x1>; + }; + + s2dos05_buck1: s2dos05-buck1 { + regulator-name = "s2dos05-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <2100000>; + regulator-active-discharge = <0x1>; + }; + }; + }; }; }; @@ -135,8 +226,6 @@ vdda_pll_cc_ebi23: vdda_sp_sensor: vdda_ufs1_core: vdda_ufs2_core: - vdda_usb1_ss_core: - vdda_usb2_ss_core: vreg_l1a_0p875: ldo1 { regulator-min-microvolt = <880000>; regulator-max-microvolt = <880000>; @@ -157,6 +246,7 @@ vreg_l3a_1p0: ldo3 { regulator-initial-mode = ; }; + vdda_usb1_ss_core: vdd_wcss_cx: vdd_wcss_mx: vdda_wcss_pll: @@ -365,6 +455,10 @@ &qupv3_id_1 { status = "okay"; }; +&gpi_dma1 { + status = "okay"; +}; + &uart9 { status = "okay"; }; @@ -391,13 +485,55 @@ &sdhc_2 { status = "okay"; }; +&i2c11 { + status = "okay"; + clock-frequency = <400000>; + + touchscreen@48 { + compatible = "samsung,s6sy761"; + reg = <0x48>; + interrupt-parent = <&tlmm>; + interrupts = <120 0x0>; + vdd-supply = <&s2dos05_ldo2>; + avdd-supply = <&s2dos05_ldo3>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_irq_state>; + }; +}; + +&crypto { + /* FIXME: qce_start triggers an SError */ + status = "disable"; +}; + +/* Modem/wifi*/ +&mss_pil { + status = "okay"; + firmware-name = "qcom/sdm845/starqltechn/mba.mbn", "qcom/sdm845/starqltechn/modem.mbn"; +}; + +&ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/sdm845/starqltechn/ipa_fws.mbn"; + status = "okay"; +}; + &usb_1 { status = "okay"; + /* + * disable USB3 clock requirement as the device only supports + * USB2. + */ + qcom,select-utmi-as-pipe-clk; }; &usb_1_dwc3 { /* Until we have Type C hooked up we'll force this as peripheral. */ dr_mode = "peripheral"; + + maximum-speed = "high-speed"; }; &usb_1_hsphy { @@ -418,14 +554,6 @@ &usb_1_qmpphy { status = "okay"; }; -&wifi { - vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; - vdd-1.8-xo-supply = <&vreg_l7a_1p8>; - vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; - vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; - status = "okay"; -}; - &tlmm { gpio-reserved-ranges = <0 4>, <27 4>, <81 4>, <85 4>; @@ -457,4 +585,40 @@ sd_card_det_n_state: sd-card-det-n-state { function = "gpio"; bias-pull-up; }; + + i2c21_sda_state: i2c-sda-state { + pins = "gpio127"; + function = "gpio"; + drive-strength = <0x2>; + bias-disable; + }; + + i2c21_scl_state: i2c-scl-state { + pins = "gpio128"; + function = "gpio"; + drive-strength = <0x2>; + bias-disable; + }; + + touch_irq_state: touch-irq-state { + pins = "gpio120"; + function = "gpio"; + bias-disable; + output-disable; + }; +}; + +&qup_uart9_tx { + drive-strength = <0x2>; + bias-pull-up; +}; + +&qup_uart9_rx { + drive-strength = <0x2>; + bias-pull-up; +}; + +&qup_i2c11_default { + drive-strength = <2>; + bias-disable; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts index fbb8655653f..3fd0d3fd669 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts @@ -10,7 +10,11 @@ #include #include #include +#include +#include +#include #include "sdm845.dtsi" +#include "sdm845-wcd9340.dtsi" #include "pm8998.dtsi" #include "pmi8998.dtsi" @@ -22,6 +26,7 @@ / { aliases { display0 = &framebuffer0; + hsuart0 = &uart6; serial0 = &uart9; serial1 = &uart6; }; @@ -60,11 +65,6 @@ key-vol-up { }; reserved-memory { - framebuffer_region@9d400000 { - reg = <0x0 0x9d400000 0x0 (1080 * 2160 * 4)>; - no-map; - }; - ramoops: ramoops@b0000000 { compatible = "ramoops"; reg = <0 0xb0000000 0 0x00400000>; @@ -434,25 +434,24 @@ zap-shader { &i2c5 { status = "okay"; + clock-frequency = <400000>; touchscreen@38 { - compatible = "focaltech,fts8719"; + compatible = "focaltech,ft5452"; reg = <0x38>; - wakeup-source; - interrupt-parent = <&tlmm>; - interrupts = <125 IRQ_TYPE_EDGE_FALLING>; - vdd-supply = <&vreg_l28a_3p0>; - vcc-i2c-supply = <&vreg_l14a_1p88>; - pinctrl-names = "default", "suspend"; + interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l28a_3p0>; + iovcc-supply = <&vreg_l14a_1p88>; + pinctrl-0 = <&ts_int_active &ts_reset_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-names = "default", "suspend"; - reset-gpio = <&tlmm 99 GPIO_ACTIVE_HIGH>; - irq-gpio = <&tlmm 125 GPIO_TRANSITORY>; touchscreen-size-x = <1080>; touchscreen-size-y = <2160>; - focaltech,max-touch-number = <5>; }; }; @@ -460,6 +459,19 @@ &i2c10 { /* SMB1355@0x0C */ }; +&i2c11 { + status = "okay"; + clock-frequency = <400000>; + + tfa9890_codec: audio-codec@34 { + compatible = "nxp,tfa9890"; + reg = <0x34>; + vddd-supply = <&vreg_s4a_1p8>; + sound-name-prefix = "Speaker"; + #sound-dai-cells = <0>; + }; +}; + &ipa { qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; @@ -485,7 +497,7 @@ panel@0 { #address-cells = <1>; #size-cells = <0>; - reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sde_dsi_active &sde_te_active>; @@ -532,6 +544,18 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_fg { + status = "okay"; + monitored-battery = <&battery>; + power-supplies = <&pmi8998_charger>; +}; + +&pmi8998_haptics { + status = "okay"; + + qcom,wave-play-rate-us = <4255>; +}; + &pm8998_resin { linux,code = ; status = "okay"; @@ -586,6 +610,103 @@ led-1 { }; }; +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; +}; + +&q6afedai { + qi2s@22 { + reg = <22>; + qcom,sd-lines = <0>; + }; +}; + +&q6asmdai { + dai@0 { + reg = <0>; + }; + + dai@1 { + reg = <1>; + }; + + dai@2 { + reg = <2>; + }; + + dai@3 { + reg = <3>; + }; + + dai@4 { + reg = <4>; + }; + + dai@5 { + reg = <5>; + }; +}; + +/* + * Prevent garbage data on bluetooth UART lines + */ +&qup_uart6_default { + pinmux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "qup6"; + }; + + cts { + pins = "gpio45"; + bias-pull-down; + }; + + rts-tx { + pins = "gpio46", "gpio47"; + drive-strength = <2>; + bias-disable; + }; + + rx { + pins = "gpio48"; + bias-pull-up; + }; +}; + +/* + * Prevent garbage data on bluetooth UART lines + */ +&qup_uart6_default { + pinmux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "qup6"; + }; + + cts { + pins = "gpio45"; + bias-pull-down; + }; + + rts-tx { + pins = "gpio46", "gpio47"; + drive-strength = <2>; + bias-disable; + }; + + rx { + pins = "gpio48"; + bias-pull-up; + }; +}; + &qup_uart9_rx { drive-strength = <2>; bias-pull-up; @@ -604,14 +725,219 @@ &qupv3_id_1 { status = "okay"; }; +&sdhc_2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; + + vmmc-supply = <&vreg_l21a_2p95>; + vqmmc-supply = <&vreg_l13a_2p95>; + + bus-width = <4>; + /* card detection is broken, but because the battery must be removed + * to insert the card, we use this rather than the broken-cd property + * which would just waste CPU cycles polling. + */ + non-removable; +}; + &slpi_pas { firmware-name = "qcom/sdm845/axolotl/slpi.mbn"; status = "okay"; }; +&sound { + model = "SHIFT6mq"; + compatible = "qcom,sdm845-sndcard"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active>; + pinctrl-names = "default"; + + audio-routing = "RX_BIAS", "MCLK", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "AMIC3", "MIC BIAS3", + "MM_DL1", "MultiMedia1 Playback", + "MM_DL3", "MultiMedia3 Playback", + "MM_DL5", "MultiMedia5 Playback", + "MultiMedia2 Capture", "MM_UL2", + "MultiMedia4 Capture", "MM_UL4", + "MultiMedia6 Capture", "MM_UL6"; + + mm1-dai-link { + link-name = "MultiMedia1"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + }; + }; + + mm2-dai-link { + link-name = "MultiMedia2"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + }; + }; + + mm3-dai-link { + link-name = "MultiMedia3"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + mm4-dai-link { + link-name = "MultiMedia4"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; + }; + }; + + mm5-dai-link { + link-name = "MultiMedia5"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA5>; + }; + }; + + mm6-dai-link { + link-name = "MultiMedia6"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA6>; + }; + }; + + speaker-dai-link { + link-name = "Speaker Playback"; + codec { + sound-dai = <&tfa9890_codec>; + }; + + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap-wcd-dai-link { + link-name = "SLIM WCD Capture 1"; + codec { + sound-dai = <&wcd9340 1>; /* AIF1_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_1_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slim-dai-link { + link-name = "SLIM WCD Playback 1"; + codec { + sound-dai = <&wcd9340 0>; /* AIF1_PB */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_0_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap-dai-link { + link-name = "SLIM WCD Capture 2"; + codec { + sound-dai = <&wcd9340 3>; /* AIF2_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_0_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slim-wcd-dai-link { + link-name = "SLIM WCD Playback 2"; + codec { + sound-dai = <&wcd9340 2>; /* AIF2_PB */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_1_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + slimcap2-wcd-dai-link { + link-name = "SLIM WCD Capture 3"; + codec { + sound-dai = <&wcd9340 5>; /* AIF3_CAP */ + }; + + cpu { + sound-dai = <&q6afedai SLIMBUS_2_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + }; + + voicemmode1-dai-link { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; +}; + &tlmm { gpio-reserved-ranges = <0 4>, <81 4>; + sdc2_default_state: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + + /* + * It seems that mmc_test reports errors if drive + * strength is not 16 on clk, cmd, and data pins. + */ + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + }; + + sdc2_card_det_n: sd-card-det-n-state { + pins = "gpio126"; + function = "gpio"; + bias-pull-up; + }; + sde_dsi_active: sde-dsi-active-state { pins = "gpio6", "gpio11"; function = "gpio"; @@ -739,6 +1065,22 @@ &venus { firmware-name = "qcom/sdm845/axolotl/venus.mbn"; }; +&wcd9340 { + pinctrl-0 = <&wcd_intr_default>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; + vdd-buck-supply = <&vreg_s4a_1p8>; + vdd-buck-sido-supply = <&vreg_s4a_1p8>; + vdd-tx-supply = <&vreg_s4a_1p8>; + vdd-rx-supply = <&vreg_s4a_1p8>; + vdd-io-supply = <&vreg_s4a_1p8>; + + qcom,micbias1-microvolt = <2700000>; + qcom,micbias2-microvolt = <2700000>; + qcom,micbias3-microvolt = <2700000>; + qcom,micbias4-microvolt = <2700000>; +}; + &wifi { status = "okay"; @@ -749,4 +1091,5 @@ &wifi { vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; qcom,snoc-host-cap-8bit-quirk; + qcom,ath10k-calibration-variant = "shift_axolotl"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi index b02a1dc5fec..c4845b0e3b1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi @@ -118,12 +118,6 @@ vreg_s4a_1p8: pm8998-smps4 { }; reserved-memory { - /* SONY was cool and didn't diverge from MTP this time, yay! */ - cont_splash_mem: memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x2400000>; - no-map; - }; - ramoops@ffc00000 { compatible = "ramoops"; reg = <0x0 0xffc00000 0x0 0x100000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi index 93b1582e807..3b2177bb175 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi @@ -7,6 +7,9 @@ #include #include #include +#include +#include +#include #include "sdm845.dtsi" #include "sdm845-wcd9340.dtsi" #include "pm8998.dtsi" @@ -99,12 +102,6 @@ spss_mem: memory@97f00000 { no-map; }; - /* Cont splash region set up by the bootloader */ - cont_splash_mem: framebuffer@9d400000 { - reg = <0 0x9d400000 0 0x2400000>; - no-map; - }; - rmtfs_mem: memory@f6301000 { compatible = "qcom,rmtfs-mem"; reg = <0 0xf6301000 0 0x200000>; @@ -243,6 +240,14 @@ &gmu { status = "okay"; }; +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + &gpu { status = "okay"; @@ -264,7 +269,7 @@ &ibb { &lab { regulator-min-microvolt = <4600000>; regulator-max-microvolt = <6000000>; - regulator-over-current-protection; + // regulator-over-current-protection; regulator-pull-down; regulator-soft-start; }; @@ -318,6 +323,26 @@ &ipa { status = "okay"; }; +&i2c5 { + #dma-cells = <3>; + status="okay"; + + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + + /*smart PA*/ + tas2559_codec: tas2559@4c{ + #sound-dai-cells = <1>; + compatible = "ti,tas2559"; + reg = <0x4c>; + ti,tas2559-reset-gpio = <&tlmm 12 0>; + ti,tas2560-reset-gpio = <&tlmm 76 0>; + ti,tas2559-addr = <0x4c>; + ti,tas2560-addr = <0x4d>; + }; +}; + &pm8998_gpios { vol_up_pin_a: vol-up-active-state { pins = "gpio6"; @@ -355,6 +380,35 @@ &pmi8998_charger { status = "okay"; }; +&pmi8998_flash { + status = "okay"; + + led-0 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <1>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; + + led-1 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <2>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; +}; + +&pmi8998_fg { + status = "okay"; + + power-supplies = <&pmi8998_charger>; + monitored-battery = <&battery>; +}; + &pm8998_resin { linux,code = ; status = "okay"; @@ -380,12 +434,37 @@ dai@1 { dai@2 { reg = <2>; }; + + dai@3 { + reg = <3>; + }; +}; + +&pmi8998_haptics { + status = "okay"; + qcom,wave-play-rate-us = <4878>; +}; + +&q6cvp { + status = "okay"; +}; + +&q6cvs { + status = "okay"; +}; + +&q6mvm { + status = "okay"; }; &qupv3_id_0 { status = "okay"; }; +&qupv3_id_1 { + status = "okay"; +}; + &sdhc_2 { status = "okay"; @@ -414,21 +493,50 @@ &sound { mm1-dai-link { link-name = "MultiMedia1"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; }; }; mm2-dai-link { link-name = "MultiMedia2"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; }; }; mm3-dai-link { link-name = "MultiMedia3"; cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + mm4-dai-link { + link-name = "MultiMedia4"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; + }; + }; + + dai-link-voicemmode1 { + link-name = "VoiceMMode1"; + cpu { + sound-dai = <&q6voicedai VOICEMMODE1>; + }; + }; + + tas2559-dai-link { + link-name = "Primary Spkr Playback"; + cpu { + sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&tas2559_codec 0>; }; }; @@ -448,7 +556,7 @@ codec { }; slimcap-dai-link { - link-name = "SLIM Capture"; + link-name = "SLIM WCD Capture"; cpu { sound-dai = <&q6afedai SLIMBUS_0_TX>; }; @@ -458,7 +566,22 @@ platform { }; codec { - sound-dai = <&wcd9340 1>; + sound-dai = <&wcd9340 1>; /* AIF1_CAP */ + }; + }; + + slimcap2-dai-link { + link-name = "SLIM WCD Capture 2"; + cpu { + sound-dai = <&q6afedai SLIMBUS_1_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&wcd9340 3>; /* AIF2_CAP */ }; }; }; @@ -491,6 +614,37 @@ sdc2_card_det_n: sd-card-det-n-state { function = "gpio"; bias-pull-up; }; + + ts_int_default: ts-int-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <16>; + bias-pull-down; + input-enable; + }; + + ts_reset_default: ts-reset-default-state { + pins = "gpio32"; + function = "gpio"; + drive-strength = <16>; + output-high; + }; + + ts_int_sleep: ts-int-sleep-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + + ts_reset_sleep: ts-reset-sleep-state { + pins = "gpio32"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; }; &uart6 { @@ -579,4 +733,7 @@ &wifi { vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; + + qcom,snoc-host-cap-skip-quirk; + qcom,ath10k-calibration-variant = "xiaomi_beryllium"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts index 76931ebad06..74b4284b5f5 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts @@ -13,3 +13,24 @@ &display_panel { compatible = "ebbg,ft8719"; status = "okay"; }; + +&i2c14 { + status = "okay"; + + touchscreen@38 { + compatible = "focaltech,ft8719"; + reg = <0x38>; + + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + + iovcc-supply = <&vreg_l14a_1p8>; + + pinctrl-0 = <&ts_int_default &ts_reset_default>; + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; + pinctrl-names = "default", "sleep"; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <2246>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts index e9427851eba..0ca1997f934 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts @@ -13,3 +13,24 @@ &display_panel { compatible = "tianma,fhd-video", "novatek,nt36672a"; status = "okay"; }; + +&i2c14 { + status = "okay"; + + touchscreen@1 { + compatible = "novatek,nvt-ts"; + reg = <0x01>; + + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + + iovcc-supply = <&vreg_l14a_1p8>; + + pinctrl-0 = <&ts_int_default &ts_reset_default>; + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; + pinctrl-names = "default", "sleep"; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <2246>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 9648505644f..fca4e070f12 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -888,6 +888,11 @@ mdata_mem: mpss-metadata { no-map; }; + cont_splash_mem: framebuffer@9d400000 { + reg = <0 0x9d400000 0 0x2400000>; + no-map; + }; + fastrpc_mem: fastrpc { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; @@ -974,6 +979,32 @@ q6routing: routing { #sound-dai-cells = <0>; }; }; + + q6mvm: apr-service@9 { + compatible = "qcom,q6mvm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + + q6voicedai: dais { + compatible = "qcom,q6voice-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6cvs: apr-service@a { + compatible = "qcom,q6cvs"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + }; + + q6cvp: apr-service@b { + compatible = "qcom,q6cvp"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + status = "disabled"; + }; }; fastrpc { @@ -3353,8 +3384,8 @@ slpi_pas: remoteproc@5c00000 { qcom,qmp = <&aoss_qmp>; - power-domains = <&rpmhpd SDM845_CX>, - <&rpmhpd SDM845_MX>; + power-domains = <&rpmhpd SDM845_LCX>, + <&rpmhpd SDM845_LMX>; power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; @@ -4053,10 +4084,10 @@ usb_1: usb@a6f8800 { <&gcc GCC_USB30_PRIM_MASTER_CLK>; assigned-clock-rates = <19200000>, <150000000>; - interrupts = , - , - , - ; + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>; interrupt-names = "hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq", "dp_hs_phy_irq"; @@ -4104,10 +4135,10 @@ usb_2: usb@a8f8800 { <&gcc GCC_USB30_SEC_MASTER_CLK>; assigned-clock-rates = <19200000>, <150000000>; - interrupts = , - , - , - ; + interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>; interrupt-names = "hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq", "dp_hs_phy_irq"; diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts index 92a812b5f42..c54e7d3612f 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -370,6 +370,33 @@ zap-shader { &i2c1 { status = "okay"; clock-frequency = <400000>; + + embedded-controller@70 { + compatible = "lenovo,yoga-c630-ec"; + reg = <0x70>; + + interrupts-extended = <&tlmm 20 IRQ_TYPE_LEVEL_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&ec_int_state>; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "source"; + data-role = "host"; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "source"; + data-role = "host"; + }; + }; }; &i2c3 { @@ -561,6 +588,11 @@ dai@2 { }; }; +&slpi_pas { + firmware-name = "qcom/sdm850/LENOVO/81JL/qcslpi850.mbn"; + status = "okay"; +}; + &sound { compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard"; model = "Lenovo-YOGA-C630-13Q50"; @@ -688,6 +720,14 @@ mode_pin_active: mode-pin-state { bias-disable; }; + + ec_int_state: ec-int-state { + pins = "gpio20"; + function = "gpio"; + + input-enable; + bias-disable; + }; }; &uart6 { diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts index 54383731600..fae9492b9ec 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts @@ -61,12 +61,6 @@ aliases { /* Reserved memory changes */ reserved-memory { - /* Bootloader display framebuffer region */ - cont_splash_mem: memory@80400000 { - reg = <0x0 0x80400000 0x0 0x960000>; - no-map; - }; - qseecom_mem: memory@8b500000 { reg = <0 0x8b500000 0 0xa00000>; no-map; diff --git a/arch/arm64/boot/dts/qcom/sdm850.dtsi b/arch/arm64/boot/dts/qcom/sdm850.dtsi index da9f6fbe32f..89eda97daa5 100644 --- a/arch/arm64/boot/dts/qcom/sdm850.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm850.dtsi @@ -7,6 +7,17 @@ #include "sdm845.dtsi" +/delete-node/ &cont_splash_mem; + +/ { + reserved-memory { + cont_splash_mem: framebuffer@80400000 { + reg = <0x0 0x80400000 0x0 0x960000>; + no-map; + }; + }; +}; + &cpu4_opp_table { cpu4_opp33: opp-2841600000 { opp-hz = /bits/ 64 <2841600000>; diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 839c6035124..258eebfbaba 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -264,6 +265,7 @@ firmware { scm: scm { compatible = "qcom,scm-sm6115", "qcom,scm"; #reset-cells = <1>; + interconnects = <&system_noc MASTER_CRYPTO_CORE0 0 &bimc SLAVE_EBI_CH0 0>; }; }; @@ -859,6 +861,43 @@ usb_qmpphy: phy@1615000 { status = "disabled"; }; + system_noc: interconnect@1880000 { + compatible = "qcom,sm6115-snoc"; + reg = <0x0 0x01880000 0x0 0x5f080>; + clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>, + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, + <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>; + clock-names = "cpu_axi", + "ufs_axi", + "usb_axi", + "ipa"; + #interconnect-cells = <2>; + + clk_virt: interconnect-clk { + compatible = "qcom,sm6115-clk-virt"; + #interconnect-cells = <2>; + }; + + mmrt_virt: interconnect-mmrt { + compatible = "qcom,sm6115-mmrt-virt"; + #interconnect-cells = <2>; + }; + + mmnrt_virt: interconnect-mmnrt { + compatible = "qcom,sm6115-mmnrt-virt"; + #interconnect-cells = <2>; + }; + }; + + config_noc: interconnect@1900000 { + compatible = "qcom,sm6115-cnoc"; + reg = <0x0 0x01900000 0x0 0x6200>; + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>; + clock-names = "usb_axi"; + #interconnect-cells = <2>; + }; + qfprom@1b40000 { compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; reg = <0x0 0x01b40000 0x0 0x7000>; @@ -883,6 +922,59 @@ rng: rng@1b53000 { clock-names = "core"; }; + pmu@1b8e300 { + compatible = "qcom,sm6115-cpu-bwmon", "qcom,sdm845-bwmon"; + reg = <0x0 0x01b8e300 0x0 0x600>; + interrupts = ; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + interconnects = <&bimc MASTER_AMPSS_M0 1 &bimc SLAVE_EBI_CH0 1>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <(200 * 4 * 1000)>; + }; + + opp-1 { + opp-peak-kBps = <(300 * 4 * 1000)>; + }; + + opp-2 { + opp-peak-kBps = <(451 * 4 * 1000)>; + }; + + opp-3 { + opp-peak-kBps = <(547 * 4 * 1000)>; + }; + + opp-4 { + opp-peak-kBps = <(681 * 4 * 1000)>; + }; + + opp-5 { + opp-peak-kBps = <(768 * 4 * 1000)>; + }; + + opp-6 { + opp-peak-kBps = <(1017 * 4 * 1000)>; + }; + + opp-7 { + opp-peak-kBps = <(1353 * 4 * 1000)>; + }; + + opp-8 { + opp-peak-kBps = <(1555 * 4 * 1000)>; + }; + + opp-9 { + opp-peak-kBps = <(1804 * 4 * 1000)>; + }; + }; + }; + spmi_bus: spmi@1c40000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0 0x01c40000 0x0 0x1100>, @@ -912,6 +1004,12 @@ tsens0: thermal-sensor@4411000 { #thermal-sensor-cells = <1>; }; + bimc: interconnect@4480000 { + compatible = "qcom,sm6115-bimc"; + reg = <0x0 0x04480000 0x0 0x80000>; + #interconnect-cells = <2>; + }; + rpm_msg_ram: sram@45f0000 { compatible = "qcom,rpm-msg-ram"; reg = <0x0 0x045f0000 0x0 0x7000>; @@ -939,8 +1037,40 @@ sdhc_1: mmc@4744000 { <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "iface", "core", "xo", "ice"; + power-domains = <&rpmpd SM6115_VDDCX>; + operating-points-v2 = <&sdhc1_opp_table>; + interconnects = <&system_noc MASTER_SDCC_1 0 &bimc SLAVE_EBI_CH0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_SDCC_1 0>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; + bus-width = <8>; status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <250000 133320>; + opp-avg-kBps = <102400 65000>; + }; + + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <204800 200000>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_svs_plus>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <204800 200000>; + }; + }; }; sdhc_2: mmc@4784000 { @@ -961,6 +1091,10 @@ sdhc_2: mmc@4784000 { operating-points-v2 = <&sdhc2_opp_table>; iommus = <&apps_smmu 0x00a0 0x0>; resets = <&gcc GCC_SDCC2_BCR>; + interconnects = <&system_noc MASTER_SDCC_2 0 &bimc SLAVE_EBI_CH0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; bus-width = <4>; qcom,dll-config = <0x0007642c>; @@ -973,11 +1107,15 @@ sdhc2_opp_table: opp-table { opp-100000000 { opp-hz = /bits/ 64 <100000000>; required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <250000 133320>; + opp-avg-kBps = <261438 150000>; }; opp-202000000 { opp-hz = /bits/ 64 <202000000>; required-opps = <&rpmpd_opp_nom>; + opp-peak-kBps = <800000 300000>; + opp-avg-kBps = <261438 300000>; }; }; }; @@ -1091,6 +1229,12 @@ i2c0: i2c@4a80000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, <&gpi_dma0 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1107,6 +1251,12 @@ spi0: spi@4a80000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, <&gpi_dma0 1 0 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1123,6 +1273,12 @@ i2c1: i2c@4a84000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, <&gpi_dma0 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1139,6 +1295,12 @@ spi1: spi@4a84000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, <&gpi_dma0 1 1 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1155,6 +1317,12 @@ i2c2: i2c@4a88000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, <&gpi_dma0 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1171,6 +1339,12 @@ spi2: spi@4a88000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, <&gpi_dma0 1 2 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1187,6 +1361,12 @@ i2c3: i2c@4a8c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, <&gpi_dma0 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1203,6 +1383,12 @@ spi3: spi@4a8c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, <&gpi_dma0 1 3 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1219,6 +1405,12 @@ i2c4: i2c@4a90000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, <&gpi_dma0 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1235,6 +1427,12 @@ spi4: spi@4a90000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, <&gpi_dma0 1 4 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1246,6 +1444,12 @@ uart4: serial@4a90000 { clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; interrupts = ; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; status = "disabled"; }; @@ -1260,6 +1464,12 @@ i2c5: i2c@4a94000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, <&gpi_dma0 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1276,6 +1486,12 @@ spi5: spi@4a94000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, <&gpi_dma0 1 5 QCOM_GPI_SPI>; dma-names = "tx", "rx"; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>, + <&system_noc MASTER_QUP_0 0 &bimc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", + "qup-config", + "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1307,6 +1523,12 @@ usb: usb@4ef8800 { resets = <&gcc GCC_USB30_PRIM_BCR>; power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + /* TODO: USB<->IPA path */ + interconnects = <&system_noc MASTER_USB3 0 &bimc SLAVE_EBI_CH0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>; + interconnect-names = "usb-ddr", + "apps-usb"; + qcom,select-utmi-as-pipe-clk; status = "disabled"; @@ -1478,6 +1700,11 @@ mdss: display-subsystem@5e00000 { iommus = <&apps_smmu 0x420 0x2>, <&apps_smmu 0x421 0x0>; + interconnects = <&mmrt_virt MASTER_MDP_PORT0 0 &bimc SLAVE_EBI_CH0 0>, + <&bimc MASTER_AMPSS_M0 0 &config_noc SLAVE_DISPLAY_CFG 0>; + interconnect-names = "mdp0-mem", + "cpu-cfg"; + #address-cells = <2>; #size-cells = <2>; ranges; diff --git a/arch/arm64/configs/sdm845.config b/arch/arm64/configs/sdm845.config new file mode 100644 index 00000000000..8306c125202 --- /dev/null +++ b/arch/arm64/configs/sdm845.config @@ -0,0 +1,1022 @@ +# Qualcomm Snapdragon 845 (SDM845) config fragment +CONFIG_LOCALVERSION="-sdm845" + +# OnePlus 6 +CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y +CONFIG_BATTERY_BQ27XXX=m +CONFIG_HID_RMI=m +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_F55=y + +# OnePlus 6T +CONFIG_DRM_PANEL_SAMSUNG_S6E3FC2X01=y +CONFIG_SND_SOC_TFA98XX=m + +# Pocophone F1 +CONFIG_DRM_PANEL_NOVATEK_NT36672A=y +CONFIG_DRM_PANEL_EBBG_FT8719=y +CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS=m +CONFIG_QCOM_GPI_DMA=m +CONFIG_SND_SOC_TAS2559=m + +# Samsung S9 SM-G9600(starqltechn) +CONFIG_TOUCHSCREEN_S6SY761=m +CONFIG_REGULATOR_S2DOS05=m + +# SHIFT6mq +CONFIG_DRM_PANEL_VISIONOX_RM69299_SHIFT=y +CONFIG_SND_SOC_TFA989X=m + +# Odin +# Driver has been dropped +CONFIG_DRM_PANEL_INNOLUX_TD4328=y + +# Mi Mix 2S +CONFIG_DRM_PANEL_NOVATEK_NT35596S=y + +# C630 +CONFIG_DRM_TI_SN65DSI86=y +CONFIG_DRM_PANEL_EDP=y +CONFIG_PHY_QCOM_EDP=y +CONFIG_I2C_HID_OF_ELAN=m +CONFIG_BACKLIGHT_PWM=y +CONFIG_LENOVO_YOGA_C630_EC=m + +# SOC +CONFIG_FORCE_NR_CPUS=y +CONFIG_NR_CPUS=8 +CONFIG_SCSI_UFS_QCOM=y +CONFIG_QCOM_GSBI=y +CONFIG_QCOM_LLCC=y +CONFIG_QCOM_OCMEM=y +CONFIG_QCOM_RMTFS_MEM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_WCNSS_CTRL=y +CONFIG_QCOM_APR=y +CONFIG_POWER_RESET_QCOM_PON=y +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_LMH=y +CONFIG_SCHED_CLUSTER=y +CONFIG_SND_SOC_QDSP6_Q6VOICE=m +CONFIG_SCSI_UFS_BSG=y +CONFIG_PHY_QCOM_QMP_PCIE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_INTERCONNECT_QCOM_OSM_L3=y +# Notification LED +# Must be builtin as it won't be automatically modprobed +CONFIG_LEDS_TRIGGER_PATTERN=y +CONFIG_LEDS_CLASS_MULTICOLOR=m +CONFIG_LEDS_QCOM_LPG=m +CONFIG_I2C_QCOM_GENI=y + +# Flash LED +CONFIG_LEDS_QCOM_FLASH=m + +# Touchscreen - Pocophone F1 / SHIFT6mq +CONFIG_TOUCHSCREEN_EDT_FT5X06=m + +# Remoteproc +CONFIG_SLIMBUS=y +CONFIG_SLIM_QCOM_CTRL=y +CONFIG_SLIM_QCOM_NGD_CTRL=y +CONFIG_REMOTEPROC_CDEV=y + +# Battery +CONFIG_BATTERY_QCOM_FG=m +CONFIG_CHARGER_QCOM_SMB2=m +CONFIG_QCOM_SPMI_RRADC=m + +# Graphics +CONFIG_DRM=y +CONFIG_FB_SIMPLE=y +CONFIG_DRM_MSM=y +# Virtual video test driver +CONFIG_VIDEO_VIVID=m + +# Brightness Control +CONFIG_REGULATOR_QCOM_LABIBB=y +CONFIG_BACKLIGHT_QCOM_WLED=y + +# Haptics +CONFIG_FF_MEMLESS=y +CONFIG_INPUT_QCOM_SPMI_HAPTICS=m + +# Power management +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y + +# MGLRU +CONFIG_LRU_GEN=y +CONFIG_LRU_GEN_ENABLED=y + +# Misc useful things +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_DMABUF_HEAPS=y +CONFIG_UDMABUF=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_HZ_1000=y +CONFIG_MODULE_COMPRESS_ZSTD=y +# Alpine can't seem to handle this +CONFIG_MODULE_DECOMPRESS=y + +# Usage clamping (scale CPU for specific tasks) +CONFIG_UCLAMP_TASK=y +CONFIG_UCLAMP_TASK_GROUP=y + +# Needed for mounting userdata on android +CONFIG_QFMT_V2=y + +# HID/Input +CONFIG_I2C_HID=y +CONFIG_HID_GENERIC=m +CONFIG_UHID=m +CONFIG_USB_HID=m +CONFIG_INPUT_EVDEV=y +CONFIG_BT_HIDP=m +CONFIG_INPUT_JOYDEV=m + +# Persistent store +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_PSTORE_RAM=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y + +# USB +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_F_HID=y + +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_ACTIVITY=y + +# Platform +CONFIG_EFI_GENERIC_STUB=y +CONFIG_EFI_ZBOOT=y +# Causes issues with u-boot +CONFIG_FB_EFI=n + +# sm8250 +CONFIG_INTERCONNECT_QCOM_SM8250=y +CONFIG_PHY_QCOM_QMP_USB=y + +# SC7180 +CONFIG_SC_GPUCC_7180=y +CONFIG_SC_LPASS_CORECC_7180=y +CONFIG_SC_MSS_7180=y +CONFIG_SC_VIDEOCC_7180=y +CONFIG_INTERCONNECT_QCOM_SC7180=y +CONFIG_SC_DISPCC_7180=y + +# Qcom stuff +CONFIG_RPMSG_CHAR=y +CONFIG_QCOM_Q6V5_ADSP=m +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_QCOM_COINCELL=m +CONFIG_QCOM_FASTRPC=m +CONFIG_QCOM_SPMI_VADC=y +CONFIG_QCOM_SPMI_ADC5=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_QUSB2=y +CONFIG_PHY_QCOM_QMP_UFS=y +CONFIG_TYPEC=y +CONFIG_PHY_QCOM_QMP_COMBO=y +CONFIG_LEDS_CLASS_FLASH=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_WESTWOOD=y +CONFIG_DEFAULT_WESTWOOD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_F2FS_FS=y +CONFIG_NLS_UTF8=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_EXFAT_FS=m +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_SYN_COOKIES=y +CONFIG_UEVENT_HELPER=y +CONFIG_INPUT_UINPUT=m +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# Qcomlt +CONFIG_BLK_INLINE_ENCRYPTION=y +CONFIG_QCOM_QMI_COOLING=m +CONFIG_PHY_QCOM_SNPS_EUSB2=m +CONFIG_MFD_QCOM_QCA639X=y +CONFIG_MFD_QCOM_RPM=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_REPEATER=y +CONFIG_SCSI_UFS_CRYPTO=y +CONFIG_PHY_QCOM_USB_HS=y +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y +CONFIG_INTERCONNECT_QCOM_SM6115=y +CONFIG_SM_DISPCC_6115=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y +CONFIG_CRYPTO_USER_API_AEAD=y +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_DMA_CMA=y +CONFIG_SM_GPUCC_6115=y +CONFIG_USB_ONBOARD_HUB=n # Breaks USB on rb2 +CONFIG_INTERCONNECT_QCOM_QCM2290=y + +# Anbox +CONFIG_BRIDGE_NETFILTER=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX_DIAG=y +CONFIG_NETLINK_DIAG=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_ASHMEM=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y + +# Waydroid +CONFIG_PSI=y + +# WLAN debugging +CONFIG_ATH10K_DEBUG=y +CONFIG_ATH10K_DEBUGFS=y +CONFIG_ATH10K_SPECTRAL=y + +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_MULTIQ=y + +# Debugging stuff +CONFIG_STACKTRACE=y + +#pmOS Related +CONFIG_VT=y +CONFIG_CRYPTO_XTS=y +CONFIG_TMPFS_XATTR=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_BINFMT_MISC=m + +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_CT=m +CONFIG_NFT_COUNTER=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_NAT=m +CONFIG_NFT_REJECT=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NF_TABLES_IPV6=y +CONFIG_SND_USB_AUDIO=m +CONFIG_CIFS=y + +CONFIG_DRM_GUD=m + +# pmos containers kconfig +CONFIG_CGROUP_FREEZER=y +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MARK=m +CONFIG_DUMMY=m +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_RT_GROUP_SCHED=y +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_VS=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_DM_THIN_PROVISIONING=y +CONFIG_VXLAN=m +CONFIG_CGROUP_NET_PRIO=y +CONFIG_IPVLAN=m + +# pmOS ZRAM kconfig +CONFIG_ZSMALLOC=m +CONFIG_ZSMALLOC_STAT=y +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_ZSTD=y +CONFIG_ZRAM_DEF_COMP="zstd" +CONFIG_ZRAM_MEMORY_TRACKING=y +CONFIG_ZRAM_MULTI_COMP=y +CONFIG_CRYPTO_LZ4=m +CONFIG_LZ4_COMPRESS=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_ZSTD=m + +# pmOS iwd kconfig +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_CRYPTO_KPP=y +CONFIG_PKCS8_PRIVATE_KEY_PARSER=y + +# pmOS wireguard kconfig +CONFIG_WIREGUARD=m +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_FIB_RULES=y + +# pmOS community kconfig +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m + +# LEDs +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# Game controllers, etc +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_NINTENDO=m + +# Disable all unrelated stuffs afaik +CONFIG_HIBERNATION=n +CONFIG_FW_LOADER_USER_HELPER=n +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=n +CONFIG_BLK_DEV_NVME=n +CONFIG_ATA=n +CONFIG_MTD=n +CONFIG_SRAM=n +CONFIG_MEGARAID_SAS=n +CONFIG_EEPROM_AT25=n +CONFIG_SCSI_MPT3SAS=n +CONFIG_BLK_DEV_MD=n +CONFIG_DM_MIRROR=n +CONFIG_DM_ZERO=n +CONFIG_EXT2_FS=n +CONFIG_EXT3_FS=n +CONFIG_USB_DWC2=n +CONFIG_USB_CHIPIDEA=n +CONFIG_USB_MUSB_HDRC=n +CONFIG_USB_ISP1760=n +CONFIG_USB_HSIC_USB3503=n +CONFIG_USB_NET_PLUSB=n +CONFIG_TYPEC_FUSB302=n +CONFIG_EXTCON_PTN5150=n +CONFIG_REALTEK_PHY=n +CONFIG_NET_VENDOR_NI=n +CONFIG_NET_9P=n +CONFIG_CAN=n +CONFIG_BNX2X=n +CONFIG_MACB=n +CONFIG_IGB=n +CONFIG_IGBVF=n +CONFIG_SMC91X=n +CONFIG_MLX4_EN=n +CONFIG_MLX5_CORE=n +CONFIG_STMMAC_ETH=n +CONFIG_ATL1C=n +CONFIG_BRCMFMAC=n +CONFIG_WL18XX=n +CONFIG_WLCORE=n +CONFIG_ATH10K_PCI=n +CONFIG_NET_SCH_CBS=n +CONFIG_NET_SCH_ETF=n +CONFIG_NET_SCH_TAPRIO=n +CONFIG_NET_SCH_MQPRIO=n +CONFIG_NET_CLS_BASIC=n +CONFIG_NET_CLS_FLOWER=n +CONFIG_NET_CLS_ACT=n +CONFIG_NET_ACT_GACT=n +CONFIG_NET_ACT_MIRRED=n +CONFIG_NET_ACT_GATE=n +CONFIG_MDIO_BUS_MUX_MMIOREG=n +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=n +CONFIG_SND_SOC_ES7134=n +CONFIG_SND_SOC_ES7241=n +CONFIG_SND_SOC_TAS571X=n +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=n +CONFIG_GPIO_DWAPB=n +CONFIG_COMMON_CLK_XGENE=n +CONFIG_SENSORS_ARM_SCPI=n +CONFIG_TCG_TPM=n +CONFIG_BATTERY_SBS=n +CONFIG_REGULATOR_VCTRL=n +CONFIG_SND_SOC_MAX98357A=n +CONFIG_SND_SOC_RL6231=n +CONFIG_THUNDER_NIC_BGX=n +CONFIG_THUNDER_NIC_RGX=n +CONFIG_MDIO_THUNDER=n +CONFIG_CAVIUM_ERRATUM_22375=n +CONFIG_CAVIUM_ERRATUM_23154=n +CONFIG_CAVIUM_ERRATUM_27456=n +CONFIG_CAVIUM_ERRATUM_30115=n +CONFIG_CAVIUM_TX2_ERRATUM_219=n +CONFIG_HW_RANDOM_CAVIUM=n +CONFIG_EEPROM_AT24=n +CONFIG_NET_DSA=n +CONFIG_AQUANTIA_PHY=n +CONFIG_MICROSEMI_PHY=n +CONFIG_VITESSE_PHY=n +CONFIG_I2C_MUX_PCA954x=n +CONFIG_SND_SOC_PCM3168A_I2C=n +CONFIG_SENSORS_LM90=n +CONFIG_SENSORS_INA2XX=n +CONFIG_RTC_DRV_DS3232=n +CONFIG_SPI_NXP_FLEXSPI=n +CONFIG_GPIO_MAX732X=n +CONFIG_SENSORS_ISL29018=n +CONFIG_MPL3115=n +CONFIG_MFD_ROHM_BD718XX=n +CONFIG_ARM_SBSA_WATCHDOG=n +CONFIG_ARM_SMC_WATCHDOG=n +CONFIG_REGULATOR_PCA9450=n +CONFIG_REGULATOR_PFUZE100=n +CONFIG_DRM_PANEL_RAYDIUM_RM67191=n +CONFIG_DRM_PANEL_SITRONIX_ST7703=n +CONFIG_PHY_MIXEL_MIPI_DPHY=n +CONFIG_DRM_NWL_MIPI_DSI=n +CONFIG_DRM_MXSFB=n +CONFIG_SND_SOC_FSL_SAI=n +CONFIG_SND_SOC_FSL_ASRC=n +CONFIG_SND_SOC_FSL_MICFIL=n +CONFIG_SND_SOC_FSL_AUDMIX=n +CONFIG_SND_SOC_FSL_SPDIF=n +CONFIG_SND_SOC_WM8904=n +CONFIG_RTC_DRV_RV8803=n +CONFIG_RTC_DRV_DS1307=n +CONFIG_RTC_DRV_PCF85363=n +CONFIG_RTC_DRV_PCF2127=n +CONFIG_PHY_FSL_IMX8MQ_USB=n +CONFIG_FUJITSU_ERRATUM_010001=n +CONFIG_PCI_PASID=n +CONFIG_UACCE=n +CONFIG_SPI_CADENCE_QUADSPI=n +CONFIG_DW_WATCHDOG=n +CONFIG_NOP_USB_XCEIV=n +CONFIG_SURFACE_PLATFORMS=n +CONFIG_GPIO_PCA953X=n +CONFIG_BACKLIGHT_LP855X=n +CONFIG_MFD_MAX77620=n +CONFIG_SENSORS_PWM_FAN=n +CONFIG_SENSORS_INA3221=n +CONFIG_REGULATOR_MAX8973=n +CONFIG_USB_CONN_GPIO=n +CONFIG_MICREL_PHY=n +CONFIG_MFD_BD9571MWV=n +CONFIG_DRM_PANEL_LVDS=n +CONFIG_DRM_RCAR_LVDS=n +CONFIG_COMMON_CLK_VC5=n +CONFIG_CRYPTO_DEV_CCREE=n +CONFIG_VIDEO_IMX219=n +CONFIG_VIDEO_OV5645=n +CONFIG_SND_SOC_AK4613=n +CONFIG_SND_SIMPLE_CARD=n +CONFIG_SND_SIMPLE_CARD_UTILS=n +CONFIG_SND_AUDIO_GRAPH_CARD=n +CONFIG_TYPEC_HD3SS3220=n +CONFIG_RTC_DRV_RX8581=n +CONFIG_COMMON_CLK_CS2000_CP=n +CONFIG_KEYBOARD_ADC=n +CONFIG_REGULATOR_FAN53555=n +CONFIG_TOUCHSCREEN_ATMEL_MXT=n +CONFIG_RTC_DRV_HYM8563=n +CONFIG_MFD_SEC_CORE=n +CONFIG_PL330_DMA=n +CONFIG_GPIO_MB86S7X=n +CONFIG_MMC_SDHCI_F_SDH30=n +CONFIG_MMC_SDHCI_CADENCE=n +CONFIG_SOCIONEXT_SYNQUACER_PREITS=n +CONFIG_NET_VENDOR_SOCIONEXT=n +CONFIG_ARCH_ACTIONS=n +CONFIG_ARCH_AGILEX=n +CONFIG_ARCH_N5X=n +CONFIG_ARCH_SUNXI=n +CONFIG_ARCH_ALPINE=n +CONFIG_ARCH_APPLE=n +CONFIG_ARCH_BCM2835=n +CONFIG_ARCH_BCM4908=n +CONFIG_ARCH_BCM_IPROC=n +CONFIG_ARCH_BERLIN=n +CONFIG_ARCH_BRCMSTB=n +CONFIG_ARCH_EXYNOS=n +CONFIG_ARCH_K3=n +CONFIG_ARCH_LAYERSCAPE=n +CONFIG_ARCH_LG1K=n +CONFIG_ARCH_HISI=n +CONFIG_ARCH_KEEMBAY=n +CONFIG_ARCH_MEDIATEK=n +CONFIG_ARCH_MESON=n +CONFIG_ARCH_MVEBU=n +CONFIG_ARCH_MXC=n +CONFIG_ARCH_RENESAS=n +CONFIG_ARCH_ROCKCHIP=n +CONFIG_ARCH_S32=n +CONFIG_ARCH_SEATTLE=n +CONFIG_ARCH_INTEL_SOCFPGA=n +CONFIG_ARCH_SYNQUACER=n +CONFIG_ARCH_TEGRA=n +CONFIG_ARCH_SPRD=n +CONFIG_ARCH_THUNDER=n +CONFIG_ARCH_THUNDER2=n +CONFIG_ARCH_UNIPHIER=n +CONFIG_ARCH_VEXPRESS=n +CONFIG_ARCH_VISCONTI=n +CONFIG_ARCH_XGENE=n +CONFIG_ARCH_ZX=n +CONFIG_ARCH_ZYNQMP=n +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=n +CONFIG_ARM_ARMADA_37XX_CPUFREQ=n +CONFIG_ARM_IMX_CPUFREQ_DT=n +CONFIG_ARM_RASPBERRYPI_CPUFREQ=n +CONFIG_ARM_TEGRA186_CPUFREQ=n +CONFIG_QORIQ_CPUFREQ=n +CONFIG_RASPBERRYPI_FIRMWARE=n +CONFIG_INTEL_STRATIX10_SERVICE=n +CONFIG_INTEL_STRATIX10_RSU=n +CONFIG_IMX_SCU=n +CONFIG_IMX_SCU_PD=n +CONFIG_CAN_RCAR=n +CONFIG_CAN_RCAR_CANFD=n +CONFIG_CAN_FLEXCAN=n +CONFIG_PCI_AARDVARK=n +CONFIG_PCI_TEGRA=n +CONFIG_PCIE_RCAR_HOST=n +CONFIG_PCIE_RCAR_EP=n +CONFIG_PCI_XGENE=n +CONFIG_PCIE_ALTERA=n +CONFIG_PCIE_ALTERA_MSI=n +CONFIG_PCI_HOST_THUNDER_PEM=n +CONFIG_PCI_HOST_THUNDER_ECAM=n +CONFIG_PCIE_ROCKCHIP_HOST=n +CONFIG_PCIE_BRCMSTB=n +CONFIG_PCI_IMX6=n +CONFIG_PCI_LAYERSCAPE=n +CONFIG_PCIE_LAYERSCAPE_GEN4=n +CONFIG_PCI_HISI=n +CONFIG_PCIE_ARMADA_8K=n +CONFIG_PCIE_KIRIN=n +CONFIG_PCIE_HISI_STB=n +CONFIG_PCIE_TEGRA194_HOST=n +CONFIG_HISILICON_LPC=n +CONFIG_FSL_MC_BUS=n +CONFIG_TEGRA_ACONNECT=n +CONFIG_MTD_CFI_INTELEXT=n +CONFIG_MTD_CFI_AMDSTD=n +CONFIG_MTD_CFI_STAA=n +CONFIG_MTD_SST25L=n +CONFIG_MTD_NAND_DENALI_DT=n +CONFIG_MTD_NAND_MARVELL=n +CONFIG_MTD_NAND_FSL_IFC=n +CONFIG_SCSI_HISI_SAS=n +CONFIG_SCSI_HISI_SAS_PCI=n +CONFIG_SCSI_UFS_HISI=n +CONFIG_SCSI_UFS_EXYNOS=n +CONFIG_AHCI_CEVA=n +CONFIG_AHCI_MVEBU=n +CONFIG_AHCI_XGENE=n +CONFIG_AHCI_QORIQ=n +CONFIG_SATA_SIL24=n +CONFIG_SATA_RCAR=n +CONFIG_FSL_FMAN=n +CONFIG_FSL_DPAA_ETH=n +CONFIG_FSL_DPAA2_ETH=n +CONFIG_FSL_ENETC=n +CONFIG_FSL_ENETC_VF=n +CONFIG_FSL_ENETC_QOS=n +CONFIG_HIX5HD2_GMAC=n +CONFIG_HNS_DSAF=n +CONFIG_HNS_ENET=n +CONFIG_HNS3=n +CONFIG_HNS3_HCLGE=n +CONFIG_HNS3_ENET=n +CONFIG_SERIAL_MESON=n +CONFIG_SERIAL_MESON_CONSOLE=n +CONFIG_SERIAL_SAMSUNG=n +CONFIG_SERIAL_SAMSUNG_CONSOLE=n +CONFIG_SERIAL_TEGRA=n +CONFIG_SERIAL_TEGRA_TCU=n +CONFIG_SERIAL_IMX=n +CONFIG_SERIAL_IMX_CONSOLE=n +CONFIG_SERIAL_XILINX_PS_UART=n +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=n +CONFIG_SERIAL_FSL_LPUART=n +CONFIG_SERIAL_FSL_LPUART_CONSOLE=n +CONFIG_SERIAL_FSL_LINFLEXUART=n +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=n +CONFIG_SERIAL_MVEBU_UART=n +CONFIG_SERIAL_OWL=n +CONFIG_I2C_BCM2835=n +CONFIG_I2C_DESIGNWARE_PLATFORM=n +CONFIG_I2C_IMX=n +CONFIG_I2C_IMX_LPI2C=n +CONFIG_I2C_MESON=n +CONFIG_I2C_MT65XX=n +CONFIG_I2C_MV64XXX=n +CONFIG_I2C_OMAP=n +CONFIG_I2C_OWL=n +CONFIG_I2C_PXA=n +CONFIG_I2C_RK3X=n +CONFIG_I2C_SH_MOBILE=n +CONFIG_I2C_TEGRA=n +CONFIG_I2C_UNIPHIER_F=n +CONFIG_I2C_RCAR=n +CONFIG_SPI_ARMADA_3700=n +CONFIG_SPI_BCM2835=n +CONFIG_SPI_BCM2835AUX=n +CONFIG_SPI_DESIGNWARE=n +CONFIG_SPI_DW_DMA=n +CONFIG_SPI_DW_MMIO=n +CONFIG_SPI_FSL_LPSPI=n +CONFIG_SPI_FSL_QUADSPI=n +CONFIG_SPI_IMX=n +CONFIG_SPI_FSL_DSPI=n +CONFIG_SPI_MESON_SPICC=n +CONFIG_SPI_MESON_SPIFC=n +CONFIG_SPI_ORION=n +CONFIG_SPI_PL022=n +CONFIG_SPI_ROCKCHIP=n +CONFIG_SPI_RPCIF=n +CONFIG_SPI_S3C64XX=n +CONFIG_SPI_SH_MSIOF=n +CONFIG_SPI_SUN6I=n +CONFIG_PINCTRL_MAX77620=n +CONFIG_PINCTRL_OWL=n +CONFIG_PINCTRL_S700=n +CONFIG_PINCTRL_S900=n +CONFIG_PINCTRL_IMX8MM=n +CONFIG_PINCTRL_IMX8MN=n +CONFIG_PINCTRL_IMX8MP=n +CONFIG_PINCTRL_IMX8MQ=n +CONFIG_PINCTRL_IMX8QM=n +CONFIG_PINCTRL_IMX8QXP=n +CONFIG_PINCTRL_IMX8DXL=n +CONFIG_GPIO_ALTERA=n +CONFIG_GPIO_DAVINCI=n +CONFIG_GPIO_MPC8XXX=n +CONFIG_GPIO_MXC=n +CONFIG_GPIO_PL061=n +CONFIG_GPIO_RCAR=n +CONFIG_GPIO_UNIPHIER=n +CONFIG_GPIO_VISCONTI=n +CONFIG_GPIO_XGENE=n +CONFIG_GPIO_XGENE_SB=n +CONFIG_GPIO_PCA953X_IRQ=n +CONFIG_GPIO_BD9571MWV=n +CONFIG_GPIO_MAX77620=n +CONFIG_GPIO_SL28CPLD=n +CONFIG_ROCKCHIP_IODOMAIN=n +CONFIG_POWER_RESET_XGENE=n +CONFIG_POWER_RESET_SYSCON=n +CONFIG_GNSS_MTK_SERIAL=n +CONFIG_SENSORS_RASPBERRYPI_HWMON=n +CONFIG_SENSORS_SL28CPLD=n +CONFIG_QORIQ_THERMAL=n +CONFIG_SUN8I_THERMAL=n +CONFIG_IMX_SC_THERMAL=n +CONFIG_IMX8MM_THERMAL=n +CONFIG_ROCKCHIP_THERMAL=n +CONFIG_RCAR_THERMAL=n +CONFIG_RCAR_GEN3_THERMAL=n +CONFIG_ARMADA_THERMAL=n +CONFIG_BCM2711_THERMAL=n +CONFIG_BCM2835_THERMAL=n +CONFIG_BRCMSTB_THERMAL=n +CONFIG_EXYNOS_THERMAL=n +CONFIG_TEGRA_BPMP_THERMAL=n +CONFIG_TEGRA_SOCTHERM=n +CONFIG_UNIPHIER_THERMAL=n +CONFIG_SL28CPLD_WATCHDOG=n +CONFIG_ARM_SP805_WATCHDOG=n +CONFIG_S3C2410_WATCHDOG=n +CONFIG_SUNXI_WATCHDOG=n +CONFIG_IMX2_WDT=n +CONFIG_IMX_SC_WDT=n +CONFIG_MESON_GXBB_WATCHDOG=n +CONFIG_MESON_WATCHDOG=n +CONFIG_RENESAS_WDT=n +CONFIG_UNIPHIER_WATCHDOG=n +CONFIG_BCM2835_WDT=n +CONFIG_MFD_ALTERA_SYSMGR=n +CONFIG_MFD_AXP20X_I2C=n +CONFIG_MFD_AXP20X_RSB=n +CONFIG_MFD_EXYNOS_LPASS=n +CONFIG_MFD_HI6421_PMIC=n +CONFIG_MFD_HI655X_PMIC=n +CONFIG_MFD_MT6397=n +CONFIG_MFD_RK808=n +CONFIG_MFD_SL28CPLD=n +CONFIG_REGULATOR_AXP20X=n +CONFIG_REGULATOR_BD718XX=n +CONFIG_REGULATOR_BD9571MWV=n +CONFIG_REGULATOR_HI6421V530=n +CONFIG_REGULATOR_HI655X=n +CONFIG_REGULATOR_MAX77620=n +CONFIG_REGULATOR_MP8859=n +CONFIG_REGULATOR_MT6358=n +CONFIG_REGULATOR_MT6397=n +CONFIG_REGULATOR_PF8X00=n +CONFIG_REGULATOR_RK808=n +CONFIG_REGULATOR_S2MPS11=n +CONFIG_REGULATOR_TPS65132=n +CONFIG_IR_MESON=n +CONFIG_IR_SUNXI=n +CONFIG_MEDIA_ANALOG_TV_SUPPORT=n +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=n +CONFIG_MEDIA_SDR_SUPPORT=n +CONFIG_VIDEO_RCAR_CSI2=n +CONFIG_VIDEO_RCAR_VIN=n +CONFIG_VIDEO_SUN6I_CSI=n +CONFIG_VIDEO_SAMSUNG_S5P_JPEG=n +CONFIG_VIDEO_SAMSUNG_S5P_MFC=n +CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=n +CONFIG_VIDEO_RENESAS_FDP1=n +CONFIG_VIDEO_RENESAS_FCP=n +CONFIG_VIDEO_RENESAS_VSP1=n +CONFIG_SDR_PLATFORM_DRIVERS=n +CONFIG_VIDEO_RCAR_DRIF=n +CONFIG_DRM_I2C_NXP_TDA998X=n +CONFIG_DRM_MALI_DISPLAY=n +CONFIG_DRM_NOUVEAU=n +CONFIG_DRM_EXYNOS=n +CONFIG_DRM_EXYNOS5433_DECON=n +CONFIG_DRM_EXYNOS7_DECON=n +CONFIG_DRM_EXYNOS_DSI=n +CONFIG_DRM_EXYNOS_HDMI=n +CONFIG_DRM_EXYNOS_MIC=n +CONFIG_DRM_ROCKCHIP=n +CONFIG_ROCKCHIP_ANALOGIX_DP=n +CONFIG_ROCKCHIP_CDN_DP=n +CONFIG_ROCKCHIP_DW_HDMI=n +CONFIG_ROCKCHIP_DW_MIPI_DSI=n +CONFIG_ROCKCHIP_INNO_HDMI=n +CONFIG_ROCKCHIP_LVDS=n +CONFIG_DRM_RCAR_DU=n +CONFIG_DRM_RCAR_DW_HDMI=n +CONFIG_DRM_SUN4I=n +CONFIG_DRM_SUN6I_DSI=n +CONFIG_DRM_SUN8I_DW_HDMI=n +CONFIG_DRM_SUN8I_MIXER=n +CONFIG_DRM_TEGRA=n +CONFIG_DRM_PARADE_PS8640=n +CONFIG_DRM_SII902X=n +CONFIG_DRM_THINE_THC63LVD1024=n +CONFIG_DRM_VC4=n +CONFIG_DRM_ETNAVIV=n +CONFIG_DRM_HISI_HIBMC=n +CONFIG_DRM_HISI_KIRIN=n +CONFIG_DRM_MEDIATEK=n +CONFIG_DRM_MEDIATEK_HDMI=n +CONFIG_DRM_MESON=n +CONFIG_DRM_PL111=n +CONFIG_DRM_LIMA=n +CONFIG_DRM_PANFROST=n +CONFIG_SND_HDA_TEGRA=n +CONFIG_SND_HDA_CODEC_HDMI=n +CONFIG_SND_BCM2835_SOC_I2S=n +CONFIG_SND_SOC_FSL_EASRC=n +CONFIG_SND_IMX_SOC=n +CONFIG_SND_SOC_IMX_SGTL5000=n +CONFIG_SND_SOC_IMX_SPDIF=n +CONFIG_SND_SOC_IMX_AUDMIX=n +CONFIG_SND_SOC_FSL_ASOC_CARD=n +CONFIG_SND_MESON_AXG_SOUND_CARD=n +CONFIG_SND_MESON_GX_SOUND_CARD=n +CONFIG_SND_SOC_ROCKCHIP=n +CONFIG_SND_SOC_ROCKCHIP_SPDIF=n +CONFIG_SND_SOC_ROCKCHIP_RT5645=n +CONFIG_SND_SOC_RK3399_GRU_SOUND=n +CONFIG_SND_SOC_SAMSUNG=n +CONFIG_SND_SOC_RCAR=n +CONFIG_SND_SUN4I_I2S=n +CONFIG_SND_SUN4I_SPDIF=n +CONFIG_SND_SOC_TEGRA=n +CONFIG_SND_SOC_TEGRA210_AHUB=n +CONFIG_SND_SOC_TEGRA210_DMIC=n +CONFIG_SND_SOC_TEGRA210_I2S=n +CONFIG_SND_SOC_TEGRA186_DSPK=n +CONFIG_SND_SOC_TEGRA210_ADMAIF=n +CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=n +CONFIG_SND_SOC_GTM601=n +CONFIG_SND_SOC_RT5659=n +CONFIG_SND_SOC_WM8960=n +CONFIG_SND_SOC_WM8962=n +CONFIG_USB_XHCI_PCI_RENESAS=n +CONFIG_USB_XHCI_TEGRA=n +CONFIG_USB_EHCI_EXYNOS=n +CONFIG_USB_OHCI_EXYNOS=n +CONFIG_USB_RENESAS_USBHS_HCD=n +CONFIG_USB_RENESAS_USBHS=n +CONFIG_USB_CHIPIDEA_UDC=n +CONFIG_USB_CHIPIDEA_HOST=n +CONFIG_USB_RENESAS_USBHS_UDC=n +CONFIG_USB_RENESAS_USB3=n +CONFIG_USB_TEGRA_XUDC=n +CONFIG_MMC_SDHCI_OF_ARASAN=n +CONFIG_MMC_SDHCI_OF_ESDHC=n +CONFIG_MMC_SDHCI_ESDHC_IMX=n +CONFIG_MMC_SDHCI_TEGRA=n +CONFIG_MMC_MESON_GX=n +CONFIG_MMC_DW_EXYNOS=n +CONFIG_MMC_DW_HI3798CV200=n +CONFIG_MMC_DW_K3=n +CONFIG_MMC_DW_ROCKCHIP=n +CONFIG_MMC_SUNXI=n +CONFIG_MMC_BCM2835=n +CONFIG_MMC_MTK=n +CONFIG_MMC_SDHCI_XENON=n +CONFIG_MMC_SDHCI_AM654=n +CONFIG_MMC_OWL=n +CONFIG_RTC_DRV_MAX77686=n +CONFIG_RTC_DRV_RK808=n +CONFIG_RTC_DRV_M41T80=n +CONFIG_RTC_DRV_RV3028=n +CONFIG_RTC_DRV_S5M=n +CONFIG_RTC_DRV_FSL_FTM_ALARM=n +CONFIG_RTC_DRV_S3C=n +CONFIG_RTC_DRV_PL031=n +CONFIG_RTC_DRV_SUN6I=n +CONFIG_RTC_DRV_ARMADA38X=n +CONFIG_RTC_DRV_TEGRA=n +CONFIG_RTC_DRV_SNVS=n +CONFIG_RTC_DRV_IMX_SC=n +CONFIG_RTC_DRV_XGENE=n +CONFIG_DMA_BCM2835=n +CONFIG_DMA_SUN6I=n +CONFIG_FSL_EDMA=n +CONFIG_IMX_SDMA=n +CONFIG_K3_DMA=n +CONFIG_MV_XOR=n +CONFIG_MV_XOR_V2=n +CONFIG_OWL_DMA=n +CONFIG_TEGRA20_APB_DMA=n +CONFIG_TEGRA210_ADMA=n +CONFIG_RCAR_DMAC=n +CONFIG_RENESAS_USB_DMAC=n +CONFIG_TI_K3_UDMA=n +CONFIG_TI_K3_UDMA_GLUE_LAYER=n +CONFIG_COMMON_CLK_RK808=n +CONFIG_COMMON_CLK_FSL_SAI=n +CONFIG_COMMON_CLK_S2MPS11=n +CONFIG_COMMON_CLK_ZYNQMP=n +CONFIG_COMMON_CLK_BD718XX=n +CONFIG_CLK_RASPBERRYPI=n +CONFIG_CLK_IMX8MM=n +CONFIG_CLK_IMX8MN=n +CONFIG_CLK_IMX8MP=n +CONFIG_CLK_IMX8MQ=n +CONFIG_CLK_IMX8QXP=n +CONFIG_TI_SCI_CLK=n +CONFIG_IMX_MBOX=n +CONFIG_BCM2835_MBOX=n +CONFIG_ROCKCHIP_IOMMU=n +CONFIG_TEGRA_IOMMU_SMMU=n +CONFIG_MTK_IOMMU=n +CONFIG_OWL_PM_DOMAINS=n +CONFIG_RASPBERRYPI_POWER=n +CONFIG_FSL_DPAA=n +CONFIG_FSL_MC_DPIO=n +CONFIG_FSL_RCPM=n +CONFIG_MTK_PMIC_WRAP=n +CONFIG_ARCH_R8A774A1=n +CONFIG_ARCH_R8A774B1=n +CONFIG_ARCH_R8A774C0=n +CONFIG_ARCH_R8A774E1=n +CONFIG_ARCH_R8A77950=n +CONFIG_ARCH_R8A77951=n +CONFIG_ARCH_R8A77960=n +CONFIG_ARCH_R8A77961=n +CONFIG_ARCH_R8A77965=n +CONFIG_ARCH_R8A77970=n +CONFIG_ARCH_R8A77980=n +CONFIG_ARCH_R8A77990=n +CONFIG_ARCH_R8A77995=n +CONFIG_ARCH_R8A779A0=n +CONFIG_ARCH_R9A07G044=n +CONFIG_ROCKCHIP_PM_DOMAINS=n +CONFIG_ARCH_TEGRA_132_SOC=n +CONFIG_ARCH_TEGRA_210_SOC=n +CONFIG_ARCH_TEGRA_186_SOC=n +CONFIG_ARCH_TEGRA_194_SOC=n +CONFIG_ARCH_TEGRA_234_SOC=n +CONFIG_TI_SCI_PM_DOMAINS=n +CONFIG_ARM_IMX_BUS_DEVFREQ=n +CONFIG_ARM_IMX8M_DDRC_DEVFREQ=n +CONFIG_RENESAS_RPCIF=n +CONFIG_EXYNOS_ADC=n +CONFIG_MAX9611=n +CONFIG_ROCKCHIP_SARADC=n +CONFIG_PWM_BCM2835=n +CONFIG_PWM_IMX27=n +CONFIG_PWM_MESON=n +CONFIG_PWM_MTK_DISP=n +CONFIG_PWM_MEDIATEK=n +CONFIG_PWM_RCAR=n +CONFIG_PWM_ROCKCHIP=n +CONFIG_PWM_SAMSUNG=n +CONFIG_PWM_SL28CPLD=n +CONFIG_PWM_SUN4I=n +CONFIG_PWM_TEGRA=n +CONFIG_PWM_VISCONTI=n +CONFIG_SL28CPLD_INTC=n +CONFIG_RESET_IMX7=n +CONFIG_RESET_TI_SCI=n +CONFIG_PHY_XGENE=n +CONFIG_PHY_SUN4I_USB=n +CONFIG_PHY_HI6220_USB=n +CONFIG_PHY_HISTB_COMBPHY=n +CONFIG_PHY_HISI_INNO_USB2=n +CONFIG_PHY_MVEBU_CP110_COMPHY=n +CONFIG_PHY_MTK_TPHY=n +CONFIG_PHY_RCAR_GEN3_PCIE=n +CONFIG_PHY_RCAR_GEN3_USB2=n +CONFIG_PHY_RCAR_GEN3_USB3=n +CONFIG_PHY_ROCKCHIP_EMMC=n +CONFIG_PHY_ROCKCHIP_INNO_HDMI=n +CONFIG_PHY_ROCKCHIP_INNO_USB2=n +CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=n +CONFIG_PHY_ROCKCHIP_PCIE=n +CONFIG_PHY_ROCKCHIP_TYPEC=n +CONFIG_PHY_SAMSUNG_UFS=n +CONFIG_PHY_UNIPHIER_USB2=n +CONFIG_PHY_UNIPHIER_USB3=n +CONFIG_PHY_TEGRA_XUSB=n +CONFIG_FSL_IMX8_DDR_PMU=n +CONFIG_HISI_PMU=n +CONFIG_NVMEM_IMX_OCOTP=n +CONFIG_NVMEM_IMX_OCOTP_SCU=n +CONFIG_MTK_EFUSE=n +CONFIG_ROCKCHIP_EFUSE=n +CONFIG_NVMEM_SUNXI_SID=n +CONFIG_UNIPHIER_EFUSE=n +CONFIG_MESON_EFUSE=n +CONFIG_NVMEM_RMEM=n +CONFIG_FPGA=n +CONFIG_FPGA_MGR_STRATIX10_SOC=n +CONFIG_FPGA_BRIDGE=n +CONFIG_ALTERA_FREEZE_BRIDGE=n +CONFIG_FPGA_REGION=n +CONFIG_OF_FPGA_REGION=n +CONFIG_INTERCONNECT_IMX=n +CONFIG_INTERCONNECT_IMX8MQ=n +CONFIG_INTERCONNECT_QCOM_MSM8996=n +CONFIG_INTERCONNECT_QCOM_QCS404=n +CONFIG_INTERCONNECT_QCOM_SC7180=n +CONFIG_INTERCONNECT_QCOM_SM8150=n +CONFIG_INTERCONNECT_QCOM_SM8350=n +CONFIG_INTERCONNECT_QCOM_SM8450=n +CONFIG_INTERCONNECT_QCOM_SM8550=n +CONFIG_INTERCONNECT_QCOM_SC8280XP=n +CONFIG_ARCH_BCMBCA=n +CONFIG_ARCH_NPCM=n +CONFIG_SERIAL_BCM63XX=n +CONFIG_PINCTRL_SC8280XP=n +CONFIG_SC_GCC_8280XP=n +CONFIG_BCM_SBA_RAID=n +CONFIG_DMA_ENGINE_RAID=n +CONFIG_SENSORS_GPIO_FAN=n +CONFIG_ARCH_BCM=n +CONFIG_ARCH_NXP=n +CONFIG_NET_VENDOR_ADI=n +CONFIG_PINCTRL_SC8180X=n +CONFIG_SND_SOC_SC7180=n +CONFIG_SND_SOC_SC7280=n +CONFIG_SND_SOC_ADAU7002=n +CONFIG_SND_SOC_RT5682=n +CONFIG_SND_SOC_RT5682_I2C=n +CONFIG_SND_SOC_RT5682S=n +CONFIG_SND_SOC_WCD938X=n +CONFIG_SND_SOC_WCD938X_SDW=n +CONFIG_MMC_SDHCI_OF_DWCMSHC=n +CONFIG_CROS_TYPEC_SWITCH=n +CONFIG_SC_GCC_8180X=n +CONFIG_IOMMU_IO_PGTABLE_DART=n +CONFIG_INTERCONNECT_QCOM_SC8180X=n +CONFIG_MEMORY_HOTPLUG=n +CONFIG_MELLANOX_PLATFORM=n +CONFIG_CHROME_PLATFORMS=n +CONFIG_PINCTRL_SM8150=n +CONFIG_SM_GCC_8150=n +CONFIG_SM_GPUCC_8150=n +CONFIG_PINCTRL_SM8350=n +CONFIG_SM_GCC_8350=n +CONFIG_SM_DISPCC_8450=n +CONFIG_SM_GCC_8450=n +CONFIG_PINCTRL_SM8550=n +CONFIG_PINCTRL_SM8550_LPASS_LPI=n +CONFIG_SM_DISPCC_8550=n +CONFIG_SM_GCC_8550=n +CONFIG_SM_TCSRCC_8550=n diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index b5464199b63..32503ebb149 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -1415,9 +1415,9 @@ static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, int ret; if (!pdata->pwm_enabled) { - ret = pm_runtime_get_sync(pdata->dev); + ret = pm_runtime_get_sync(chip->dev); if (ret < 0) { - pm_runtime_put_sync(pdata->dev); + pm_runtime_put_sync(chip->dev); return ret; } } @@ -1433,7 +1433,7 @@ static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, SN_GPIO_MUX_MASK << (2 * SN_PWM_GPIO_IDX), SN_GPIO_MUX_SPECIAL << (2 * SN_PWM_GPIO_IDX)); if (ret) { - dev_err(pdata->dev, "failed to mux in PWM function\n"); + dev_err(chip->dev, "failed to mux in PWM function\n"); goto out; } } @@ -1509,7 +1509,7 @@ static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); if (ret) { - dev_err(pdata->dev, "failed to update PWM_PRE_DIV\n"); + dev_err(chip->dev, "failed to update PWM_PRE_DIV\n"); goto out; } @@ -1521,7 +1521,7 @@ static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED); ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv); if (ret) { - dev_err(pdata->dev, "failed to update PWM_EN/PWM_INV\n"); + dev_err(chip->dev, "failed to update PWM_EN/PWM_INV\n"); goto out; } @@ -1529,7 +1529,7 @@ static int ti_sn_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, out: if (!pdata->pwm_enabled) - pm_runtime_put_sync(pdata->dev); + pm_runtime_put_sync(chip->dev); return ret; } @@ -1589,12 +1589,14 @@ static int ti_sn_pwm_probe(struct auxiliary_device *adev, { struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); - pdata->pchip.dev = pdata->dev; + pdata->pchip.dev = &adev->dev; pdata->pchip.ops = &ti_sn_pwm_ops; pdata->pchip.npwm = 1; pdata->pchip.of_xlate = of_pwm_single_xlate; pdata->pchip.of_pwm_n_cells = 1; + devm_pm_runtime_enable(&adev->dev); + return pwmchip_add(&pdata->pchip); } @@ -1605,7 +1607,7 @@ static void ti_sn_pwm_remove(struct auxiliary_device *adev) pwmchip_remove(&pdata->pchip); if (pdata->pwm_enabled) - pm_runtime_put_sync(pdata->dev); + pm_runtime_put_sync(&adev->dev); } static const struct auxiliary_device_id ti_sn_pwm_id_table[] = { diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 7a0220d29a2..b35626b2df1 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2001,12 +2001,7 @@ static void a6xx_recover(struct msm_gpu *gpu) dev_pm_genpd_add_notifier(gmu->cxpd, &gmu->pd_nb); dev_pm_genpd_synced_poweroff(gmu->cxpd); - /* Drop the rpm refcount from active submits */ - if (active_submits) - pm_runtime_put(&gpu->pdev->dev); - - /* And the final one from recover worker */ - pm_runtime_put_sync(&gpu->pdev->dev); + pm_runtime_force_suspend(&gpu->pdev->dev); if (!wait_for_completion_timeout(&gmu->pd_gate, msecs_to_jiffies(1000))) DRM_DEV_ERROR(&gpu->pdev->dev, "cx gdsc didn't collapse\n"); @@ -2015,10 +2010,7 @@ static void a6xx_recover(struct msm_gpu *gpu) pm_runtime_use_autosuspend(&gpu->pdev->dev); - if (active_submits) - pm_runtime_get(&gpu->pdev->dev); - - pm_runtime_get_sync(&gpu->pdev->dev); + pm_runtime_force_resume(&gpu->pdev->dev); gpu->active_submits = active_submits; mutex_unlock(&gpu->active_lock); diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 99e14dc212e..99124320288 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -398,6 +398,16 @@ config DRM_PANEL_NOVATEK_NT35560 mode. This supports several panels such as Sony ACX424AKM and ACX424AKP. +config DRM_PANEL_NOVATEK_NT35596S + tristate "Novatek NT35596S DSI panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for the panels built + around the Novatek NT35596S display controller, such as some + JDI panels used in a few Xiaomi Mi Mix 2S mobile phones. + config DRM_PANEL_NOVATEK_NT35950 tristate "Novatek NT35950 DSI panel" depends on OF @@ -644,16 +654,28 @@ config DRM_PANEL_SAMSUNG_S6E8AA0 select VIDEOMODE_HELPERS config DRM_PANEL_SAMSUNG_SOFEF00 - tristate "Samsung sofef00/s6e3fc2x01 OnePlus 6/6T DSI cmd mode panels" + tristate "Samsung sofef00 OnePlus 6 DSI cmd mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + help + Say Y or M here if you want to enable support for the Samsung AMOLED + command mode panel found in the OnePlus 6 smartphone. + + The panel is 2280x1080@60Hz + +config DRM_PANEL_SAMSUNG_S6E3FC2X01 + tristate "Samsung s6e3fc2x01 OnePlus 6T DSI cmd mode panel" depends on OF depends on DRM_MIPI_DSI depends on BACKLIGHT_CLASS_DEVICE select VIDEOMODE_HELPERS help Say Y or M here if you want to enable support for the Samsung AMOLED - command mode panels found in the OnePlus 6/6T smartphones. + command mode panel found in the OnePlus 6T smartphone. - The panels are 2280x1080@60Hz and 2340x1080@60Hz respectively + The panel is 2340x1080@60Hz config DRM_PANEL_SEIKO_43WVF1G tristate "Seiko 43WVF1G panel" @@ -825,6 +847,15 @@ config DRM_PANEL_VISIONOX_RM69299 Say Y here if you want to enable support for Visionox RM69299 DSI Video Mode panel. +config DRM_PANEL_VISIONOX_RM69299_SHIFT + tristate "Visionox RM69299 SHIFT6mq" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Visionox + RM69299 command mode panel variant found in the SHIFT6mq. + config DRM_PANEL_VISIONOX_VTDR6130 tristate "Visionox VTDR6130" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index d10c3de51c6..9fd3ac441b3 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35596S) += panel-novatek-nt35596s.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o @@ -66,6 +67,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI) += panel-samsung-s6e63m0-dsi.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01) += panel-samsung-s6e88a0-ams452ef01.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF00) += panel-samsung-sofef00.o +obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E3FC2X01) += panel-samsung-s6e3fc2x01.o obj-$(CONFIG_DRM_PANEL_SEIKO_43WVF1G) += panel-seiko-43wvf1g.o obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o obj-$(CONFIG_DRM_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o @@ -84,6 +86,7 @@ obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o +obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299_SHIFT) += panel-visionox-rm69299-shift.o obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o diff --git a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c index e85d63a176d..2ad37758079 100644 --- a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c +++ b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c @@ -87,22 +87,22 @@ static int ebbg_ft8719_on(struct ebbg_ft8719 *ctx) return 0; } -static int ebbg_ft8719_off(struct ebbg_ft8719 *ctx) +static int ebbg_ft8719_disable(struct drm_panel *panel) { - struct mipi_dsi_device *dsi = ctx->dsi; - struct device *dev = &dsi->dev; + struct ebbg_ft8719 *ctx = to_ebbg_ft8719(panel); + struct device *dev = &ctx->dsi->dev; int ret; - dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; - ret = mipi_dsi_dcs_set_display_off(dsi); + ret = mipi_dsi_dcs_set_display_off(ctx->dsi); if (ret < 0) { dev_err(dev, "Failed to set display off: %d\n", ret); return ret; } usleep_range(10000, 11000); - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); + ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); if (ret < 0) { dev_err(dev, "Failed to enter sleep mode: %d\n", ret); return ret; @@ -137,13 +137,8 @@ static int ebbg_ft8719_prepare(struct drm_panel *panel) static int ebbg_ft8719_unprepare(struct drm_panel *panel) { struct ebbg_ft8719 *ctx = to_ebbg_ft8719(panel); - struct device *dev = &ctx->dsi->dev; int ret; - ret = ebbg_ft8719_off(ctx); - if (ret < 0) - dev_err(dev, "Failed to un-initialize panel: %d\n", ret); - gpiod_set_value_cansleep(ctx->reset_gpio, 1); ret = regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); @@ -188,6 +183,7 @@ static int ebbg_ft8719_get_modes(struct drm_panel *panel, static const struct drm_panel_funcs ebbg_ft8719_panel_funcs = { .prepare = ebbg_ft8719_prepare, + .disable = ebbg_ft8719_disable, .unprepare = ebbg_ft8719_unprepare, .get_modes = ebbg_ft8719_get_modes, }; @@ -233,6 +229,7 @@ static int ebbg_ft8719_probe(struct mipi_dsi_device *dsi) drm_panel_init(&ctx->panel, dev, &ebbg_ft8719_panel_funcs, DRM_MODE_CONNECTOR_DSI); + ctx->panel.prepare_prev_first = true; ret = drm_panel_of_backlight(&ctx->panel); if (ret) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35596s.c b/drivers/gpu/drm/panel/panel-novatek-nt35596s.c new file mode 100644 index 00000000000..b1c724ebf8f --- /dev/null +++ b/drivers/gpu/drm/panel/panel-novatek-nt35596s.c @@ -0,0 +1,565 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Linaro Ltd + * Author: Sumit Semwal + * Copyright (C) 2023 Arnaud Ferraris + * + * This driver is for the DSI interface to panels using the NT35596S display driver IC + * from Novatek. + * Currently supported are the JDI FHD panels found in some Xiaomi phones, including + * some variants of the Mi Mix 2S phone. + * + * Panels using the Novatek NT35596S IC should add appropriate configuration per-panel and + * use this driver. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include